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19-4410; rev 5; 9/11 maX8903A-max8903e/max8903g/max8903h/ max8903j/max8903n/max8903y???li + smart power selector tm (???) ??(usb)?? ??????????? ????usb? ?????? H??????? ??mosfet???? max8903_?????? ?usb??? sys?????? ??sys2a usb100ma500ma? ????????? 4.15v16v???? 20v?usb??4.1v6.3v? 8v ??max8903_??? ??????usb??? ???????? ?????? ??????? ????? max8903_4mm x 4mm28?qfn? ?max8903_?? ????????? max8903b/max8903e/max8903g???? ????? ?? ? ? pda?? ?y ?? ? ?? s dc-dc?? s 4mhz?????? s ??/???1 s ?usb /usb/????? 50m????? ?usbZ s s ? s ?mosfet s 4.1v16v?? ? ? + ??(pb)/rohs??? * ep = ?? t = ? ??? smart power selectormaxim integrated products, inc.?? ? maX8903A/max8903e/max8903g/max8903h/max8 903j/max8903n/max8903y???li + ? smart power selector tm (???) ??(usb)?? ?????????? ?????usb? ????? ? H???? ?????mosfet?? ? max8903_?????? ?usb?? sys???? ??? ?sys 2 a usb 100ma 500ma ????? ????? 4.15v16v???? 20v?usb??4.1v6.3v 8v ??max8903_?? ???????usb? ??????? ???????? ????? ????? ????max8903_ 4mm x 4mm28?qfn? ?max8903_?? ???????? ?max8903b/max8903e/max89 03g? ???????? ?? ? ? pda?? ?y ?? ? ? ?? ?pc features ' efficient dc-dc converter eliminates heat ' 4mhz switching for tiny external components ' instant onworks with no/low battery ' dual current-limiting inputsac adapter or usb automatic adapter/usb/battery switchover to support load transients 50m? system-to-battery switch supports usb spec ' thermistor monitor ' integrated current-sense resistor ' no external mosfets or diodes ' 4.1v to 16v input operating voltage range maX8903A-e/g/h/j/n/y 2ali+dc-dc usb?? 19-4410; rev 5; 9/11 ??????????????? ?????maxim?10800 852 1249 ()10800 152 1249 () maxim?china.maxim-ic.com selector guide appears at end of data sheet. charge and sys load switch dc sys bat ac adapter or usb system load battery gnd usb usb charge current load current lx cs pwm step-down max8903_ typical operating smart power selector is a trademark of maxim integrated products, inc. ordering information +denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. part temp range pin-package maX8903A eti+t -40c to +85c 28 thin qfn-ep* max8903b eti+t -40c to +85c 28 thin qfn-ep* max8903c eti+t -40c to +85c 28 thin qfn-ep* max8903d eti+t -40c to +85c 28 thin qfn-ep* max8903e eti+t -40c to +85c 28 thin qfn-ep* max8903g eti+t -40c to +85c 28 thin qfn-ep* max8903h eti+t -40c to +85c 28 thin qfn-ep* max8903jeti+t -40c to +85c 28 thin qfn-ep* max8903n eti+t -40c to +85c 28 thin qfn-ep* max8903y eti+t -40c to +85c 28 thin qfn-ep* maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 1 ? ?pc charge and sys load switch dc sys bat ac adapter or usb system load battery gnd usb usb charge current load current lx cs pwm step-down max8903_ available evaluation kit available ?????????????? ? ????? maxi m? 1080 0 85 2 124 9 () 1080 0 15 2 124 9 ( ) maxi m?china.maximintegrated.com 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y
stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. dc, lx to gnd .......................................................-0.3v to +20v dcm to gnd .............................................-0.3v to (v dc + 0.3v) dc to sys .................................................................-6v to +20v bst to gnd ...........................................................-0.3v to +26v bst to lx................................................................-0.3v to +6v usb to gnd .............................................................-0.3v to +9v usb to sys..................................................................-6v to +9v vl to gnd ................................................................-0.3v to +6v thm, idc, iset, ct to gnd........................-0.3v to (v vl + 0.3v) dok, flt, cen, uok, chg , usus, bat, sys, iusb, cs to gnd ................................-0.3v to +6v sys to bat ..............................................................-0.3v to +6v pg, ep (exposed pad) to gnd .............................-0.3v to +0.3v dc continuous current (total in two pins).....................2.4a rms usb continuous current......................................................1.6a lx continuous current (total in two pins)......................2.4a rms cs continuous current (total in two pins) ......................2.4a rms sys continuous current (total in two pins) .......................3a rms bat continuous current (total in two pins) .......................3a rms vl short circuit to gnd .............................................continuous continuous power dissipation (t a = +70nc) 28-pin thin qfn-ep multilayer (derate 28.6mw/c above +70nc) ..........2286mw 28-pin thin qfn-ep single-layer (derate 20.8mw/c above +70nc)...1666.7mw operating temperature range ...........................-40nc to +85nc junction temperature range ............................-40nc to +150nc storage temperature range .............................-65nc to +150nc lead temperature (soldering, 10s) ................................+300n c soldering temperature (reflow) ......................................+260nc electrical characteristics (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) (note 1) absolute maximum ratings 2ali+dc-dc usb?? electrical characteristics (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to parameter conditions min typ max units dc input dc operating range 4.15 16 v no valid usb input 3.9 4.0 4.1 dc undervoltage threshold when v dok goes low, v dc rising, 500mv typical hysteresis valid usb input 4.0 4.3 4.4 v dc overvoltage threshold when v dok goes high, v dc rising, 500mv typical hysteresis 16.5 17 17.5 v charger enabled, no switching, v sys = 5v 2.3 4 charger enabled, f = 3mhz, v dc = 5v 15 c har g er enab l ed , v c e n k?k k k ?k?k ?kk k k?k k ek?k k ek??k ? ok ?nk k enk k e?k k ek ?k k c e n = 5v , 100m a u s b m od e ( n ote 2) 12 dc supply current v dcm = 0v, v usus = 5v 0.10 0.25 ma dc high-side resistance 0.15 ? dc low-side resistance 0.15 ? dc-to-bat dropout resistance assumes a 40m ? inductor resistance (r l ) 0.31 ? dc-to-bat dropout voltage when sys regulation and charging stops, v dc falling, 200mv hysteresis 0 15 30 mv minimum off time (t offmin ) 100 ns minimum on time (t onmin ) 70 ns v dc = 8v, v bat = 4v 4 maX8903A/b/c/d/e/h/j/y v dc = 5v, v bat = 3v 3 v dc = 9v, v bat = 4v 1 switching frequency (f sw ) max8903g v dc = 9v, v bat = 3v 1 mhz dc step-down output current- limit step range 0.5 2 a r idc = 3k? 1900 2000 2100 r idc = 6k? 950 1000 1050 dc step-down output current limit (i sdlim ) v dc = 6v, v sys = 4v r idc = 12k? 450 500 550 ma dc, lx to gnd .......................................................-0.3v to +20v dcm to gnd ..............................................-0.3v to (v dc + 0.3v) dc to sys .................................................................-6v to +20v bst to gnd ...........................................................-0.3v to +26v bst to lx ................................................................-0.3v to +6v usb to gnd .............................................................-0.3v to +9v usb to sys..................................................................-6v to +9v vl to gnd ................................................................-0.3v to +6v thm, idc, iset, ct to gnd........................-0.3v to (v vl + 0.3v) dok, flt, cen, uok, chg, usus, bat, sys, iusb, cs to gnd ................................-0.3v to +6v sys to bat ...............................................................-0.3v to +6v pg, ep (exposed pad) to gnd .............................-0.3v to +0.3v dc continuous current (to tal in two pins)......................2.4a rms usb continuous current.......................................................1.6a lx continuous current (total in two pins).......................2.4a rms cs continuous current (total in two pins) ......................2.4a rms sys continuous current (total in two pins) .......................3a rms bat continuous current (total in two pins) .......................3a rms vl short circuit to gnd .............................................continuous continuous power dissipation (t a = +70c) 28-pin thin qfn-ep multilayer (derate 28.6mw/c above +70c) ..........2286mw 28-pin thin qfn-ep single-layer (derate 20.8mw/c above +70c)...1666.7mw operating temperature range ...........................-40c to +85c junction temperature range ............................-40c to +150c storage temperature range ... ..........................-65c to +150c maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 2 2ali + dc-dc usb?? 2 maxim integrated 2 maX8903A-e/g/h/j/n/y
electrical characteristics (continued) (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) (note 1) 2ali+dc-dc usb?? parameter conditions min typ max units no valid usb input 1 ms dc soft-start time valid usb input before soft-start 20 s dc output current 500ma usb mode (note 3) v dcm = 0v, v iusb = 5v 450 475 500 ma dc output current 100ma usb mode (note 2) v dcm = 0v, v iusb = 0v 90 95 100 ma sys to dc reverse current blocking v sys = 5.5v, v dc = 0v 0.01 a usb input usb operating range 4.1 6.3 v usb standoff voltage 8v usb undervoltage threshold when v uok goes low, v usb rising, 500mv hysteresis 3.95 4.0 4.05 v usb overvoltage threshold when v uok goes high, v usb rising, 500mv hysteresis 6.8 6.9 7.0 v v iusb = 0v (100ma setting) 90 95 100 usb current limit v iusb = 5v (500ma setting) 450 475 500 ma i sys = i bat = 0ma, v cen = 0v 1.3 3 i sys = i bat = 0ma, v cen = 5v 0.8 2 usb supply current v usus = 5v (usb suspend mode) 0.115 0.25 ma minimum usb to bat headroom 0 15 30 mv usb to sys dropout resistance 0.2 0.35 ? v usb rising 1 ms usb soft-start time v dc falling below dc uvlo to initiate usb soft-start 20 s sys output maX8903A/b/e/g/y 3.0 minimum sys regulation voltage (v sysmin ) i sys = 1a, v bat < v sysmin max8903c/d/h/j/n 3.4 v maX8903A/c/d/h/n/y 4.3 4.4 4.5 max8903b/e/g 4.265 4.325 4.395 regulation voltage i sys = 0a max8903j 4.4 4.5 4.55 v maX8903A/c/d/h 40 load regulation i sys = 0 to 2a max8903b/e/g/j/n/y 25 mv/a cs to sys resistance v dc = 6v, v dcm = 5v, v sys = 4v, i cs = 1a 0.07 ? sys to cs leakage v sys = 5.5v, v dc = v cs = 0v 0.01 a bat to sys resistance v dc = v usb = 0v, v bat = 4.2v, i sys = 1a 0.05 0.1 ? bat to sys reverse regulation voltage v usb = 5v, v dc = 0v, v iusb = 0v, i sys = 200ma 50 75 100 mv sys undervoltage threshold sys falling, 200mv hysteresis (note 4) 1.8 1.9 2.0 v electrical characteristics (continued) (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 3 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y 3 maxim integrated 3
electrical characteristics (continued) (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) (note 1) 2ali+dc-dc usb?? parameter conditions min typ max units battery charger t a = +25c 4.179 4.200 4.221 maX8903A/b/c/g/h t a = -40c to +85c 4.158 4.200 4.242 t a = +25c 4.079 4.100 4.121 max8903d/e t a = -40c to +85c 4.059 4.100 4.141 t a = +25c 4.328 4.350 4.372 max8903j t a = -40c to +85c 4.307 4.350 4.394 t a = +25c 4.129 4.150 4.171 bat regulation voltage (v batreg ) i bat = 0ma max8903y/n t a = -40c to +85c 4.109 4.150 4.192 v c har g er restar t thr eshol d change in v bat from done to fast-charge -150 -100 -60 mv maX8903A/c/d/h/j/n/y 2.9 3.0 3.1 bat prequal threshold (v batpq ) v bat rising 180mv hystersis max8903b/e/g 2.4 2.5 2.6 v prequal charge current percentage of fast-charge current set at iset 10 % r iset = 600? 1800 2000 2200 r iset = 1.2k? (maX8903A/c/d) 900 1000 1100 fast-charge current r iset = 2.4k? 450 500 550 ma done threshold (i term ) percentage of fast-charge, i bat decreasing 10 % r iset resistor range 0.6 2.4 k ? iset output voltage 1.5 v iset current monitor gain 1.25 ma/a no dc or usb input 0.05 4 bat leakage current with valid input power, v cen = 5v 3 6 a charger soft-start time 1.0 ms charger thermal limit temperature 100 c charger thermal limit gain charge current = 0 at + 120c 5 %/c charger timer prequalification time c ct = 0.15f 33 min fast-charge time c ct = 0.15f 660 min maX8903A/c/d/h/j/n/y (fixed) 15 s top-off timer (t top-off ) max8903b/e/g, c ct = 0.15f 132 min timer accuracy -15 +15 % timer extend current threshold percentage of fast-charge current below which the timer clock operates at half-speed 40 50 60 % timer suspend current threshold percentage of fast-charge current below which timer clock pauses 16 20 24 % electrical characteristics (continued) (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 4 2ali + dc-dc usb?? 4 maxim integrated 4 maX8903A-e/g/h/j/n/y
electrical characteristics (continued) (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) (note 1) 2ali+dc-dc usb?? parameter conditions min typ max units thermistor monitor thm threshold, hot when charging is suspended, 1% hysteresis 0.27 x v vl 0.28 x v vl 0.29 x v vl v thm threshold, cold when charging is suspended, 1% hysteresis 0.73 x v vl 0.74 x v vl 0.75 x v vl v thm threshold, disabled thm function is disabled below this voltage 0.0254 x v vl 0.03 x v vl 0.036 x v vl v thm threshold dc, usb enable max8903b/max8903e/max8903g 0.83 x v vl 0.87 x v vl 0.91 x v vl v thm = gnd or vl; t a = +25c -0.1 00 0.001 +0.200 maX8903A/c/d/h/j/n/y thm = gnd or vl; t a = +85c 0.01 0 thm input leakage max8903b/e/g thm = gnd or vl; t a = -40c to +85c -0.200 0.001 +0.200 a thermal shutdown, vl, and logic i/o: chg, flt, dok, uok, dcm, cen , usus, iusb high level 1.3 low level 0.4 v logic-input thresholds (dcm, cen , usus, iusb) hysteresis 50 mv t a = +25c -1.000 0.001 +1.000 v input = 0v to 5.5v (maX8903A/c/d/h/j/n/y) t a = +85c 0.01 0 logic-input leakage current ( cen , usus, iusb) v input = 0v to 5.5v (max8903b/e/g) t a = -40c to +85c -0.200 0.001 +0.200 a t a = +25c 0.001 1 logic-input leakage current (dcm) v dcm = 0v to 16v v dc = 16v t a = +85c 0.01 a sinking 1ma 8 50 logic output voltage, low ( chg , flt, dok , uok ) sinking 10ma 80 mv t a = +25c 0.001 1 open-drain output leakage c ur rent, hi g h ( chg , flt , dok , uok ) v out = 5.5v t a = +85c 0.01 a electrical characteristics (continued) (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 5 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y 5 maxim integrated 5
electrical characteristics (continued) (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) (note 1) parameter conditions mint yp max units thermistor monitor thm threshold, ho tw hen charging is suspended, 1% hysteresis 0.27 x v vl 0.28 x v vl 0.29 x v vl v thm threshold, cold when charging is suspended, 1% hysteresis 0.73 x v vl 0.74 x v vl 0.75 x v vl v thm threshold, disabled thm function is disabled below this voltage 0.0254 x v vl 0.03 x v vl 0.036 x v vl v thm threshold dc, usb enable max8903b/max8903e/max8903g 0.83 x v vl 0.87 x v vl 0.91 x v vl v thm = gnd or vl; t a = +25c -0. 1 00 0.001 +0.200 maX8903A/c/d/h/j/n/ y thm = gnd or vl; t a = +85c 0.01 0 thm input leakag e max8903b/e/g thm = gnd or vl; t a = -40c to +85c -0.200 0.001 +0.200 a thermal shutdown, vl, and logic i/o: chg, flt, dok, uok, dcm, cen, usus, iusb high level 1.3 low level 0.4 v logic-input thresholds (dcm, ce n, usus, iusb) hysteresi s5 0m v t a = +25c -1.000 0.001 +1.000 v inpu t = 0v to 5.5v (maX8903A/c/d/h/j/n/y ) t a = +85c 0.01 0 logic-input leakage current ( ce n, usus, iusb) v inpu t = 0v to 5.5v (max8903b/e/g) t a = -40c to +85c -0.200 0.001 +0.200 a t a = +25c 0.001 1 logic-input leakage current (dcm) v dcm = 0v to 16v v dc = 16v t a = +85c 0.01 a sinking 1m a8 50 logic output voltage, low ( chg , flt , dok , uok ) sinking 10m a8 0 mv t a = +25c 0.001 1 open-drain output leakag e c ur re nt , hi g h ( ch g , fl t , do k , uo k ) v out = 5.5v t a = +85c 0.01 a parameter conditions mint yp max units i vl = 0 to 1ma (maX8903A/c/d/h/j/n/y ) 4.6 5.0 5.4 vl output voltage v dc = v usb = 6v i vl = 0 to 10ma (m ax8903b/ e/ g) 4.6 5.0 5.4 v vl uvlo threshold v vl falling; 200mv hysteresis 3.2 v thermal shutdown temperature 160 c thermal shutdown hysteresis 15 c note 1: limits are 100% production tested at t a = +25c. limits over the operating temperature range are guaranteed by design. note 2: for the 100ma usb mode using the dc input, the step-down regulator is turned off and its high-side switch operates as a linear regulator with a 100ma current limit. the linear regulators output is connected to lx and its output current flows through the inductor into cs and finally to sys. note 3: for the 500ma usb mode, the actual current drawn from usb is less than the output current due to the input/output current ratio of the dc-dc converter. note 4: for short-circuit protection, sys sources 25ma below v sys = 400mv, and 50ma for v sys between 400mv and 2v. ? (t a = +25c, unless otherwise noted.) 2ali+dc-dc usb?? electrical characteristics (continued) (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) note 1: limits are 100% production tested at t a = +25c. limits over the operating temperature range are guaranteed by design. note 2: for the 100ma usb mode using the dc input, the step-down regulator is turned off and its high-side switch o perates as a l inear regulator with a 100ma current limit. the linear regulators output is connected to lx and its output current flows through the inductor into cs and finally to sys. note 3: for the 500ma usb mode, the actual current drawn from usb is less than the output current due to the input/output current ratio of the dc-dc converter. note 4: for short-circuit protection, sys sources 25ma below v sys = 400mv, and 50ma for v sys between 400mv and 2v. typical operating maX8903A/b/c/d/e/h/j/n/y battery charger efficiency vs. battery voltage maX8903A toc01 battery voltage (v) efficiency (%) 4.5 4.0 3.0 3.5 2.0 2.5 1.5 10 20 30 40 50 60 70 80 90 100 0 1.0 5.0 v dc = 8v i bat = 0.15a i bat = 1.5a v dc = 5v v dc = 12v max8903g battery charger efficiency vs. battery voltage maX8903A toc01a battery voltage (v) efficiency (%) 4.5 4.0 3.0 3.5 2.0 2.5 1.5 10 20 30 40 50 v dc = 12v i batt = 0.15a i batt = 1.5a 60 70 80 90 100 0 1.0 5.0 v dc = 6v v dc = 9v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 4.0 3.5 4.5 4 86 10 12 14 16 maX8903A/b/c/d/e/h/j/n/y switching frequency vs. v dc maX8903A toc02 dc voltage (v) switching frequency (mhz) v bat = 3v r iset = 1.2k? v cen = 0v v bat = 4v maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 6 2ali + dc-dc usb?? 6 maxim integrated 6 maX8903A-e/g/h/j/n/y
electrical characteristics (continued) (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40nc to +85nc, unless otherwise noted. typical values are at t a = +25nc.) (note 1) 2ali+dc-dc usb?? parameter conditions min typ max units no valid usb input 1 ms dc soft-start time valid usb input before soft-start 20 s dc output current 500ma usb mode (note 3) v dcm = 0v, v iusb = 5v 450 475 500 ma dc output current 100ma usb mode (note 2) v dcm = 0v, v iusb = 0v 90 95 100 ma sys to dc reverse current blocking v sys = 5.5v, v dc = 0v 0.01 a usb input usb operating range 4.1 6.3 v usb standoff voltage 8v usb undervoltage threshold when v uok goes low, v usb rising, 500mv hysteresis 3.95 4.0 4.05 v usb overvoltage threshold when v uok goes high, v usb rising, 500mv hysteresis 6.8 6.9 7.0 v v iusb = 0v (100ma setting) 90 95 100 usb current limit v iusb = 5v (500ma setting) 450 475 500 ma i sys = i bat = 0ma, v cen = 0v 1.3 3 i sys = i bat = 0ma, v cen = 5v 0.8 2 usb supply current v usus = 5v (usb suspend mode) 0.115 0.25 ma minimum usb to bat headroom 0 15 30 mv usb to sys dropout resistance 0.2 0.35 ? v usb rising 1 ms usb soft-start time v dc falling below dc uvlo to initiate usb soft-start 20 s sys output maX8903A/b/e/g/y 3.0 minimum sys regulation voltage (v sysmin ) i sys = 1a, v bat < v sysmin max8903c/d/h/j/n 3.4 v maX8903A/c/d/h/n/y 4.3 4.4 4.5 max8903b/e/g 4.265 4.325 4.395 regulation voltage i sys = 0a max8903j 4.4 4.5 4.55 v maX8903A/c/d/h 40 load regulation i sys = 0 to 2a max8903b/e/g/j/n/y 25 mv/a cs to sys resistance v dc = 6v, v dcm = 5v, v sys = 4v, i cs = 1a 0.07 ? sys to cs leakage v sys = 5.5v, v dc = v cs = 0v 0.01 a bat to sys resistance v dc = v usb = 0v, v bat = 4.2v, i sys = 1a 0.05 0.1 ? bat to sys reverse regulation voltage v usb = 5v, v dc = 0v, v iusb = 0v, i sys = 200ma 50 75 100 mv sys undervoltage threshold sys falling, 200mv hysteresis (note 4) 1.8 1.9 2.0 v electrical characteristics (continued) (v dc = v usb = 5v, v bat = 4v, circuit of figure 2, t a = -40c to +85c, unless otherwise noted. typical values are at t a = +25c.) maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 3 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y 3 maxim integrated 3
?() (t a = +25c, unless otherwise noted.) 2ali+dc-dc usb?? normalized charge current vs. ambient temperature maX8903A toc10 temperature ( ?? ? normalized battery regulation voltage vs. ambient temperature maX8903A toc11 temperature ( c) normalized battery regulation voltage (%) 60 35 10 -15 99.6 99.7 99.8 99.9 100.0 100.1 100.2 100.3 100.4 100.5 99.5 -40 85 22ppm/ c 0 1.5 1.0 0.5 2.5 2.0 4.5 4.0 3.5 3.0 5.0 0 1234567 maX8903A/c/d/h/n/y sys voltage vs. usb voltage maX8903A toc12 usb voltage (v) sys voltage (v) v usb falling v cen = 5v v bat = 0v v dc = 0v v usb rising r sys = 1m? 0 1.0 0.5 2.0 1.5 3.0 2.5 3.5 4.5 4.0 5.0 0 468 2 10 12 14 16 18 maX8903A/c/d/h/n/y sys voltage vs. dc voltage maX8903A toc13 dc voltage (v) sys voltage (v) v dc rising v dc falling v cen = 5v v bat = 0v v usb = 0v sys voltage vs. sys output current, dc input maX8903A toc14 sys output current (a) sys voltage (v) 1.5 1.0 0.5 3.9 4.0 4.1 4.2 4.3 4.4 4.5 4.6 3.8 0 2.0 v usb = 0v max8903j, v dc = 5.75v max8903n/y, v dc = 5.75v maX8903A /c/d/h, v dc = 5.75v max8903b/e/g, v dc = 5.75v max8903_, v dc = 0v 400300200100 sys voltage vs. sys output current, usb input maX8903A toc15 sys output current (ma) sys voltage (v) 3.9 4.0 4.1 4.2 4.3 4.4 4.5 4.6 3.8 0 500 v dc = 0v, v batt = 4v max8903j, v usb = 5v max8903n/y, v usb = 5v maX8903A /c/d/h, v usb = 5v max8903b/e/g, v usb = 5v max8903_, v usb = 0v vl voltage vs. dc voltage maX8903A toc16 dc voltage (v) vl voltage (v) 18161412108642 1 2 3 4 5 6 0 0 20 vl with no load and dcdc off (v usus = 5v) vl and dcdc with full load (v usus = 0v) v bat = 3.6v v usb = 0v charge profile1400mah battery adapter input1a charge maX8903A toc17 time (min) v bat (v) i bat (a) 120100 60 80 4020 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0 0.2 0.4 0.6 0.8 1.0 1.2 0.0 0 140 v bat i dc set to 1a i bat set to 2a i bat maX8903A/b/c/g/h typical operating characteristics (continued) maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 8 2ali + dc-dc usb?? 8 maxim integrated 8 maX8903A-e/g/h/j/n/y
?() (t a = +25c, unless otherwise noted.) maX8903A-e/g/h/j/n/y 2ali+dc-dc usb?? _______________________________________________________________________________________ 9 maX8903A/b/c/g/h charge profile1400mah battery usb input500ma charge time (min) v bat (v) i bat (a) 180160120 140 40 60 80 100 20 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0 0 200 v bat i bat maX8903A toc18 maX8903A/max8903b/max8903c i usb set to 500ma i bat set to 2a 200ns/div maX8903A/b/c/d/e/h/j/n/y dc switching waveformslight load 20mv/div ac-coupled maX8903A toc19 500ma/div 0a 5v/div 0v v out v lx i lx r sys = 44? max8903g dc switching waveformslight load maX8903A toc19a 10v/div 0a 50mv/div ac-coupled 0v 1a/div v sys v lx i lx 1s/div v dc = 9v, l = 2.2h c sys = 22f, r sys = 44i maX8903A/b/c/d/e/h/j/n/y dc switching waveformsheavy load maX8903A toc20 200ns/div v lx v out i lx 5v/div 0v 20mv/div ac-coupled 500ma/div 0a r sys = 5? max8903g dc switching waveformsheavy load maX8903A toc20a 10v/div 0a 50mv/div ac-coupled 0v 1a/div v sys v lx i lx 1s/div v dc = 9v, l = 2.2h c sys = 22f, r sys = 5i cen = 1 dc connect with usb connected (r sys = 25?) maX8903A toc21 200 typical operating characteristics (continued) maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 9 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 9 9
?() (t a = +25c, unless otherwise noted.) 2ali+dc-dc usb?? 10 ______________________________________________________________________________________ 400 dc connect with no usb (r sys = 25?) 2v/div maX8903A toc22 5v/div 1a/div 1a/div 3.6v 3.84v 3.6v 3.44v c dc charging c sys charging 850ma -1a battery charger soft-start 144ma 0a v sys v bat i dc i bat -i bat = charging 40 dc disconnect with no usb (r sys = 25?) 2v/div maX8903A toc23 5v/div 1a/div 1a/div 3.6v 3.68v 850ma -1a 144ma 0a v sys v bat i dc i bat 3.6v -i bat = charging maX8903A/c/d/h sys load transient maX8903A toc24a 0a 20mv/div ac-coupled 500ma/div v sys 4.400v 4.360v 1a 0a i sys 100s/div maX8903A v dc = 10.5v l = 2.2h c sys = 10f r idc = 3ki (2a) dcm = high cen = 1 max8903b/e sys load transient maX8903A toc24b 0a 20mv/div 500ma/div v sys 4.325v 4.305v 1a 0a i sys 100s/div max8903b v dc = 10.5v l = 2.2h c sys = 22f r idc = 3ki (2a) dcm = high cen = 1 max8903g sys load transient maX8903A toc24c 0a 50mv/div 500ma/div v sys 0a 1a 4.325v 4.305v i sys 100s/div v dc = 9v l = 2.2h c sys = 22f r idc = 3ki (2a) dcm = 1 cen = 1 400 usb connect with no dc (r sys = 25?) 2v/div maX8903A toc25 5v/div 500ma/div 500ma/div 3.6v c usb charging battery charger soft-start 144ma v sys v usb i usb i bat 3.5v 3.75v 5v 475ma -330ma typical operating characteristics (continued) maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 10 2ali + dc-dc usb?? 10 maxim integrated 10 maX8903A-e/g/h/j/n/y
? 1, 2 pg ???nmosfet???pg??? 3, 4 dc ???dc?sys??2a?dc??usb?dc?? ??dcmiusbidc?2dc???dcpg?? 4.7f??? 5 dcm ?????????idcgnd??? ??????500ma100maiusb?dcm ()dc ()?????1? 6 bst ?mosfet??0.1 f???bstlx 7 iusb usb?iusb????usb?100maiusb??? ?usb?500ma 8 dok ??dc????????? (cen????)?dok? 9 vl ?ldovl?ldomax8903_?bst?vlgnd? ?1f??? 10 ct N??ctgnd??(c ct )?????gnd??? 11 idc ???idcgnd??(r idc )dcm??????? ?0.5a2a 12 gnd ?gnd????? ?() (t a = +25c, unless otherwise noted.) maX8903A-e/g/h/j/n/y 2ali+dc-dc usb?? ______________________________________________________________________________________ 11 typical operating characteristics (continued) 100 usb disconnect with no dc (r sys = 25?) 2v/div maX8903A toc26 5v/div 500ma/div 500ma/div 3.6v 475ma v sys v usb i usb i bat 5v 144ma -330ma 200 usb suspend 5v/div maX8903A toc27 500ma/div 2v/div 500ma/div 475ma -475ma v usus i usb v sys i bat 3v 0v 0a 3.7v 0a 200 usb resume 5v/div maX8903A toc28 500ma/div 2v/div 500ma/div 475ma -475ma 3v 0v 0a 3.6v 0a 3.6v 3.8v battery charger soft-start c usb charging v usus i usb v sys i bat pin description pin name function 1, 2 pg power ground for step-down low-side synchronous n-channel mosfet. both pg pins must be connected together externally. 3, 4 dc dc power input. dc is capable of delivering up to 2a to sys. dc supports both ac adapter and usb inputs. the dc current limit is set through dcm, iusb, or idc depending on the input source used. see table 2. both dc pins must be connected together externally. connect at least a 4.7f ceramic capacitor from dc to pg. 5 dcm current-limit mode setting for the dc power input. when logic-high, the dc input current limit is set by the resistance from idc to gnd. when logic-low, the dc input current limit is internally programmed to 500ma or 100ma, as set by the iusb logic input. there is an internal diode from dcm (anode) to dc (cathode) as shown in figure 1. 6 bst high-side mosfet driver supply. bypass bst to lx with a 0.1f ceramic capacitor. 7 iusb usb current-limit set input. drive iusb logic-low to set the usb current limit to 100ma. drive iusb logic- high to set the usb current limit to 500ma. 8 dok dc power-ok output. active-low open-drain output pulls low when a valid input is detected at dc. dok is still valid when the charger is disabled ( cen high). 9 vl logic ldo output. vl is the output of an ldo that powers the max8903_ internal circuitry and charges the bst capacitor. connect a 1f ceramic capacitor from vl to gnd. 10 ct charge timer set input. a capacitor (c ct ) from ct to gnd sets the fast-charge and prequal fault timers. connect to gnd to disable the timer. 11 idc dc current-limit set input. connect a resistor (r idc ) from idc to gnd to program the current limit of the step-down regulator from 0.5a to 2a when dcm is logic-high. 12 gnd ground. gnd is the low-noise ground connection for the internal circuitry. maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 11 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 11 11
?() 13 iset ?isetgnd??(r iset )???2a??10% 14 cen ??cengnd?dcusb?????vl? ???? 15 usus usb?usus????usb??usb115 a?sys bat 16 thm ????(ntc)thmgnd???? + 25 c? ??thmvl??~????thmgnd ???? 17 usb usb??usb?sys?100ma500ma?iusb?usbgnd? ?4.7f??? 18 flt ??????????????? 19 uok usb?usb?????????(cen ??)?uok? 20, 21 bat ???li+ ?dcusb???sysdcusb ??sys??batsysbat???? 22 chg ??????????????chg?? 23, 24 sys ???dcusbsys??sys??50m ??? bat dcusb??sys?v sysreg ??(i sys )dcusb?sys ?bat 50mv???sys x5rx7r???sysgndsys(c sys )??6sys?? ?? 25, 26 cs 70m ??lxcs????cssys??70m mosfet????cs mosfet??sysdc 27, 28 lx ??lxcs??lx??? ep ???gnd??????? 2ali + dc-dc usb?? 12 maxim integrated 12 maX8903A-e/g/h/j/n/y
?1. ?? 2ali+dc-dc usb?? sys battery connector b at+ bat- + ntc t thm usb bat iset li+ battery charger and sys load switch ic thermal regulation charger current- voltage control usb uok dc dok dc power management pwm step-down regulator pwr ok usb power management current- limited voltage regulator set input limit pwr ok vl chg flt ct charge termination and monitor charge timer thermistor monitor (see figure 7) cen input and charger current-limit set logic dcm dc iusb usus idc 500ma 100ma usb limit dc limit ac adapter gnd dc mode usb suspend to system load lx cs bst set input limit pg ep max8903_ figure 1. functional block diagram maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 13 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 13 13
?2????dcusb ? max8903_???16v??? usb?ic???(16v)dc-dc?? ????????? ???????2a? usb?usb???? usbdc?????? ??????? max8903_??50m mosfet? ??????? ?????? 2ali+dc-dc usb?? circuit description the max8903_ is a dual input charger with a 16v input for a wide range of dc sources and usb inputs. the ic includes a high-voltage (16v) input dc-dc step-down converter that reduces charger power dissipation while also supplying power to the system load. the step- down converter supplies up to 2a to the system, the battery, or a combination of both. a usb charge input can charge the battery and power the system from a usb power source. when powered from usb or the dc input, system load current peaks that exceed what can be supplied by the input are sup- plemented by the battery. the max8903_ also manages load switching from the battery to and from an external power source with an on-chip 50m? mosfet. this switch also helps support pg pg dc dc bst lx lx cs cs sys sys bat bat flt uok dok fault output usb pwr ok dc pwr ok to vl r pu 4 x 100k? 18 19 8 24 23 21 20 1 2 3 4 6 27 28 25 26 17 usb iset idc r iset r idc dcm thm cen iusb gnd ep ntc 10k? usus 5 9 16 12 charge on off 100ma 500ma usb suspend 14 7 15 to system load chg 22 charge indicator c dc 4.7f ct c ct 0.15f adapter vbus gnd c bst 0.1f l1 1h 13 11 c usb 4.7f usb (see table 5 for inductor selection) 10 r t 10k? to dc 1-cell li+ c bat 10f c vl 1f c sys (see table 6 for c sys selection) vl max8903_ figure 2. typical application circuit using a separate dc and usb connector maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 14 2ali + dc-dc usb?? 14 maxim integrated 14 maX8903A-e/g/h/j/n/y
?3???mini 5dc/usb? ?1?ic??? ????????? usbdc???? ????(??? ??) ?? + 100 c?max8903_? ???3?? dc???? dc??usb???? ?dc?sys???? ?????(v sysmin ?4) ???????? ??????idc?? iset????? ????? ??????? ??????? 2ali+dc-dc usb?? load peaks using battery power when the input source is overloaded. as shown in figure 1, the ic includes a full-featured charger with thermistor monitor, fault timer, charger status, and fault outputs. also included are power-ok signals for both usb and dc. flexibility is maintained with adjustable charge current, input current limit, and a minimum system voltage (when charging is scaled back to hold the system voltage up). the max8903_ prevents overheating during high ambi- ent temperatures by limiting charging current when the die temperature exceeds +100c. dc inputfast hysteretic step-down regulator if a valid dc input is present, the usb power path is turned off and power for sys and battery charging is supplied by the high-frequency step-down regulator from dc. if the battery voltage is above the minimum system voltage (v sysmin , figure 4), the battery charger connects the system voltage to the battery for lowest pg pg dc dc bst lx lx cs cs sys sys bat bat flt uok dok fault output usb pwr-ok dc pwr-ok to vl r pu 4 x 100k? 18 19 8 24 23 21 20 1 2 3 4 6 27 28 25 26 17 usb iset idc r iset r idc dcm thm cen iusb gnd ntc 10k? usus 5 9 16 12 charge on off 100ma 500ma usb suspend 14 7 15 to system load chg 22 charge indicator c dc 4.7f l1 1h ct ep c ct 0.15f c bst 0.1f 13 11 10 r t 10k? 1-cell li+ c bat 10f c sys (see table 6 for c sys selection) vl max8903_ vbus d- d+ id gnd c vl 1f usb adapter dc mode 499k? (see table 5 for inductor value selection) figure 3. typical application circuit using a mini 5 style connector or other dc/usb common connector maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 15 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 15 15
1?2?3?? ??v sysmin ????? ????(v sys )?v sysmin ?4? ????max8903_ ??v sysmin ?3.0v3.4v6 ?v sysmin ?50mv??? ???????? ??? dc-dc?? ???pwm??????? ???????? ??????? ????4mhz??? ????????? ????4mhz??? ?????????? ?????4mhz??? ????? ????? sys???????? ?????? ?? ? ? dc??(dcm) 2?dc??(2a)usb ( 500ma)?dcm?????dc? ??dcidcgnd?? (r idc )?r idc : r idc = 6000v/i dc-max dcm?????dciusb ??500ma100maiusb?? ???dc?500madc?? ?sysiusb?????dc ?100ma100ma????? ????100ma ?lxcs sys dcm???dc???1? ??dcm?dc?dcm ??dc?3????? mosfetdcm?????dcm dc?3??? mosfet??? 2ali+dc-dc usb?? 16 ______________________________________________________________________________________ power dissipation. the step-down regulation point is then controlled by three feedback signals: maximum step-down output current programmed at idc, maximum charger current programmed at iset, and maximum die temperature. the feedback signal requiring the smallest current controls the average output current in the inductor. this scheme minimizes total power dissi- pation for battery charging and allows the battery to absorb any load transients with minimum system volt- age disturbance. if the battery voltage is below v sysmin , the charger does not directly connect the system voltage to the battery and the system voltage (v sys ) is slightly above v sysmin as shown in figure 4. the battery charger independently controls the battery charging current. v sysmin is set to either 3.0v or 3.4v based on the version of max8903_. see table 6. after the battery charges to 50mv above v sysmin , the system voltage is connected to the battery. the battery fast-charge current then controls the step-down con- verter to set the average inductor current so that both the programmed input current limit and fast-charge cur- rent limit are satisfied. dc-dc step-down control scheme a proprietary hysteretic current pwm control scheme ensures fast switching and physically tiny external com- ponents. the feedback control signal that requires the smalles t input current controls the center of the peak and valley currents in the inductor. the ripple current is internally set to provide 4mhz operation. when the input voltage decreases near the output voltage, very high duty cycle occurs and, due to minimum off-time, 4mhz operation is not achievable. the controller then provides minimum off-time, peak current regulation. similarly, when the input voltage is too high to allow 4mhz operation due to the minimum on-time, the con- troller becomes a minimum on-time, valley current regu- lator. in this way, ripple current in the inductor is always as small as possible to reduce ripple voltage on sys for a given capacitance. the ripple current is made to vary with input volt age and output voltage in a way that reduces frequency variation. however, the frequency still varies somewhat with operating conditions. see the typical operating characteristics. dc mode (dcm) as shown in table 2, the dc input supports both ac adapters (up to 2a) and usb (up to 500ma). with the dcm logic input set high, the dc input is in adapter mode and the dc input current limit is set by the resis- tance from idc to gnd (r idc ). calculate r idc accord- ing to the following equation: r idc = 6000v/i dc-max with the dcm logic input set low, the dc input current limit is internally programmed to 500ma or 100ma as set by the iusb logic input. with the iusb logic input set high, the dc input current limit is 500ma and the dc input delivers current to sys through the step-down regulator. with the iusb logic input set low, the dc input current limit is 100ma. in this 100ma mode, the step-down regulator is turned off and its high-side switch operates as a linear regulator with a 100ma cur- rent limit. the linear regulators output is connected to lx and its output current flows through the inductor into cs and finally to sys. c o m po n en t ( f i g u r es 2 a n d 3) function part c dc , c usb input filter capacitor 4.7f ceramic capacitor c vl vl filter capacitor 1.0f ceramic capacitor c sys sys output bypass capacitor 10f ( m ax 8903a/m ax 8903c / m ax 8903d /m ax 8903h / m ax 8903j) or 22f ( m ax 8903b/m ax 8903e / m ax 8903g/m ax 8903y ) cer am i c cap aci tor c bat battery bypass capacitor 10f ceramic capacitor c ct charger timing capacitor 0.15f low tc ceramic capacitor r pu (x4) logic output pullup resistors 100k ? thm negative tc thermistor philips ntc thermistor, p/n 2322-640-63103, 0k ? 5% at +25c r t thm pullup resistor 10k ? r idc d c i np ut cur r ent- l i m i t p r og r am m i ng r esi stor 3k ? 1%, for 2a limit r iset fast-charge current programming resistor 1.2k ? 1%, for 1a charging l1 dc input step-down inductor 1h inductor with i sat > 2a table 1. external components list for figures 2 and 3 maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 16 2ali + dc-dc usb?? 16 maxim integrated 16 maX8903A-e/g/h/j/n/y
?3mosfetdcm??dcm ????1m ?dok ? dok ????dcm???? dcm?dc1m ?dcm? dc?? a usb?? usbdcsys?? usbsys?????sys ?dc?(?4?)? sys???? usbusbdcdc? usbiusb????100ma 500ma ?(uokdok) dok ??????dc? ??usb??4.15v < v dc < 16v?dc ?? dok ?? ?usb? ?4.45v < v dc < 16v?dc?? dok ???usb? dc ???????? ?dc??dok? uok ??????usb? ??usb?? uok ????4.1v < v usb < 6.6v?usb??usb? ?uok? uok dok ??usb??? ????dokuok?? ??(pok) ? ?? + 100 c??5%/ c ????+120 c??0ma ??????? sys????0ma? ??????? + 120 c?dcusb? v sys ?v bat 50mv ??? dc dc??????sys ?sys???? ????? ????dc? ??????? ?sysbat?????? ????sys?dcusb dc????? ?usb??? ?????sys?dc sys??v sysreg ?? ????? ?sys???sysbat? 50m pmos??????? ??sysbat????? dc?50m pmos?? usb usb?dc????usb sys????? ?????sys?? usbsys????? ??usb?? ????sys?? ??sys??v sysreg usbdc ?dc? ?4sysv bat ??? maX8903A- 2ali+dc-dc usb?? ______________________________________________________________________________________ 17 the dcm pin has an internal diode to dc as shown in figure 1. to prevent current from flowing from dcm through the internal diode and to the dc input, dcm cannot be driven to a voltage higher than dc. the circuit of figure 3 shows a simple mosfet and resistor on dcm to prevent any current from flowing from dcm through the internal diode to dc. this circuit of figure 3 allows a microprocessor to drive the gate of the mos- fet to any state at any time. an alternativ e to the simple mosfet and resistor on dcm as shown in figure 3 is to place a 1m? resistor in series with the dcm input to the microprocessor. the microprocessor can then monitor the dok output and make sure that whenever dok is high dcm is also low. in the event that dcm is driven to a higher voltage than dc, the 1m? series resistance limits the current from dcm through the internal diode to dc to a few a. usb inputlinear regulator if a valid usb input is present with no valid dc input, current for sys and battery charging is supplied by a low-dropout linear regulator connected from usb to sys. the sys regulation voltage shows the same char- acteristic as when powering from the dc input (see figure 4). the battery charger operates from sys with any extra available current, while not exceeding the maximum-allowed usb current. if both usb and dc inputs are valid, power is only taken from the dc input. the maximum usb input current is set by the logic state of the iusb input to either 100ma or 500ma. power monitor outputs ( uok , dok ) dok is an open-drain, active-low output that indicates the dc input power status. with no source at the usb pin, the source at dc is considered valid and dok is driven low wh en: 4.15v < v dc < 16v. when the usb voltage is also valid, the dc source is considered valid and dok is driven low when: 4.45v < v dc < 16v. the higher minimum dc voltage with usb present helps guarantee cleaner transitions between input supplies. if the dc power-ok output feature is not required, con- nect dok to ground. uok is an open-drain, active-low output that indicates the usb input pow er status. uok is low when a valid source is connected at usb. the source at usb is valid when 4.1v < v usb < 6.6v. if the usb power-ok output feature is not required, connect uok to ground. both the uok and the dok circuitry remain active in thermal overload, usb suspend, and when the charger is disabled. dok and uok can also be wire-ored together to generate a single power-ok ( pok) output. thermal limiting when the die temperature exceeds +100c, a thermal limiting circuit reduces the input current limit by 5%/c, bringing the charge current to 0ma at +120c. since the system load gets priority over battery charging, the battery charge current is reduced to 0ma before the input limiter drops the load voltage at sys. to avoid false charge termination, the charge termination detect function is disabled in this mode. if the junction temper- atur e rises beyond +120c, no current is drawn from dc or usb, and v sys regulates at 50mv below v bat . system voltage switching dc input when charging from the dc input, if the battery is above the minimum system voltage, sys is connected to the battery. current is provided to both sys and the battery, up to the maximum program value. the step- down output current sense and the charger current sense provide feedback to ensure the current loop demanding the lower input current is satisfied. the advantage of this approach when powering from dc is that power dissipation is dominated by the step-down regulator efficiency, since there is only a small voltage drop from sys to bat. also, load transients can be absorbed by the battery while minimizing the voltage disturbance on sys. if both the dc and usb inputs are valid, the dc input takes priority and delivers the input current, while the usb input is off. after the battery is done charging, the charger is turned off and the sys load current is supplied from the dc input. the sys voltage is regulated to v sysreg . the charger turns on again after the battery drops to the restart threshold. if the load current exceeds the input limiter, sys drops down to the battery voltage and the 50m? sys-to-bat pmos switch turns on to supply the extra load current. the sys-to-bat switch turns off again once the load is below the input current limit. the 50m? pmos also turns on if valid dc input power is removed. i bat x r on v batreg v sysreg v bat v sysmin v sys v cen = 0v v dc and/or v usb = 5.0v max8903_ maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 17 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 17 17
2? usb usus????dcm?????? sys170 ausb ??2? ?(cen) cen ????? cen ???? ??? cen ?sys?? ???(???)??? max8903_?????/ ?????cen??? ????usb??? ?????? ??sys????? ???50 s??dcusb? sysusbdc???? ?sys????batv sys < v bat ?bat??sys? sys?sys???? sys????sys??? ** ???sys?? *** dcm ()dc ()?????1?? pdcm??mosfet??3 ?x = ?? 2ali+dc-dc usb?? 18 ______________________________________________________________________________________ usb input when charging from the usb input, the dc input step- down regulator turns off and a linear regulator from usb to sys powers the system and charges the bat- tery. if the battery is greater than the minimum system voltage, the sys voltage is connected to the battery. the usb input then supplies the sys load and charges the battery with any extra available current, while not exceeding the maximum-allowed usb current. load transients can be absorbed by the battery while mini- mizing the voltage disturbance on sys. when battery charging is completed, or the charger is disabled, sys is regulated to v sysreg . if both usb and dc inputs are valid, power is only taken from the dc input. usb suspend driving usus high and dcm low turns off charging as well as the sys output and reduces input current to 170a to accommodate usb suspend mode. see table 2 for settings. charge enable ( cen ) when cen is low, the charger is on. when cen is high, the charger turns off. cen does not affect the sys out- put. in many systems, there is no need for the system controller (typically a microprocessor) to disable the charger, because the max8903_ smart power selector circuitry independently manages charging and adapter/battery power hand-off. in these situations, cen may be connected to ground. soft-start to prevent input transients that can cause instability in the usb or ac adapter power source, the rate of change of the input current and charge current is limited. when an input source is valid, sys current is ramped from zero to the set current-limit value in typically 50s. this also means that if dc becomes valid after usb, the sys current limit is ramped down to zero before switch- ing from the usb to dc input. at some point, sys is no longer able to support the load and may switch over to power source dok uok dcm*** iusb usus dc step-down output current limit usb input current limit maximum charge current** ac adapter at dc input l x h x x 6000v/r idc lesser of 1200v/r iset and 6000v/r idc l x l l l 100ma lesser of 1200v/r iset and 100ma l x l h l 500ma lesser of 1200v/r iset and 500ma usb power at dc input l x l x h usb suspend usb input off. dc input has priority. 0 h l x l l 100ma lesser of 1200v/r iset and 100ma h l x h l 500ma lesser of 1200v/r iset and 500ma usb power at usb input, dc unconnected h l x x h usb suspend 0 dc and usb unconnected h h x xx no dc input no usb input 0 table 2. input limiter control logic **charge current cannot exceed the input current limit. charge may be less than the maximum charge current if the total sys load exceeds the input current limit. ***there is an internal diode from dcm (anode) to dc (cathode) as shown in figure 1. if the dcm level needs to be set by a p, use a mosfet for isolation as shown in figure 3. maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 18 2ali + dc-dc usb?? 18 maxim integrated 18 maX8903A-e/g/h/j/n/y
?0aiset??? ??1.0ms????usb dc?iusb??usb100ma ?500ma???? r iset ???????di/dt? ? ????? ?isetgnd???? r iset s r iset = 1200v/i chgmax isetgnd????? ??1.5v?? ?????sys?? ?usb??100ma500ma ?????5 v bat v batpq ???? ?10%?????? ???v batreg ?? 10%done????100mv ?? ? ?(i term )????? ????15s?? done?? ?????i term done???done?? i term ?????? ??? ???? ??(chg) chg???????? ?????? chg ??? ???? chg ? ? ?( p)?? chg ?i/o?? ?k? p??????chg 20ma??led?? ??(flt) flt ???????? ????N?? flt ????????33 ?????660?? (?6?)????? cen ??? ?( p)?? flt ?i/o?? ?k? p??????flt 20ma??led??? flt?flt????? N? ???????? ?ct??(c ct ) ?5isetgnd???? maX8903A- 2ali+dc-dc usb?? ______________________________________________________________________________________ 19 bat. the switchover to bat occurs when v sys < v bat . this threshold is a function of the sys capacitor size and sys load. the sys current limit then ramps from zero to the set current level and sys supports the load again as long as the sys load current is less than the set current limit. when the charger is turned on, the charge current ramps from 0a to the iset current value in typically 1.0ms. charge current also soft-starts when transitioning to fast- charge from prequal, when the input power source is switched between usb and dc, and when changing the usb charge current from 100ma to 500ma with the iusb logic input. there is no di/dt limiting, however, if r iset is changed suddenly using a switch. battery charger while a valid input source is present, the battery charg- er attempts to charge the battery with a fast-charge current determined by the resistance from iset to gnd. calculate the r iset resistance according to the following equation: r iset = 1200v/i chgmax monitoring charge current the voltage from iset to gnd is a representation of the battery charge current and can be used to monitor the current charging the battery. a voltage of 1.5v repre- sents the maximum fast-charge current. if necessary, the charge current is reduced automati- cally to prevent the sys voltage from dropping. therefore, a battery never charges at a rate beyond the capabilities of a 100ma or 500ma usb input, or over- loads an ac adapter. see figure 5. when v bat is below v batpq , the charger enters pre- qual mode and the battery charges at 10% of the maxi- mum fast-charge rate until the voltage of the deeply discharged battery recovers. when the battery voltage reaches v batreg and the charge current drops to 10% of the maximum fast-charge current, the charger enters the done state. the charger restarts a fast-charge cycle if the battery voltage drops by 100mv. charge termination when the charge current falls to the termination thresh- old (i term ) and the charger is in voltage mode, charg- ing is complete. charging continues for a brief 15s top-off period and then enters the done state where charging stops. note that if charge current falls to i term as a result of the input or thermal limiter, the charger does not enter done. for the charger to enter done, charge current must be less than i term , the charger must be in volt- age mode, and the input or thermal limiter must not be reducing charge current. charge status outputs charge output ( chg ) chg is an open-drain, active-low output that indicates charger status. chg is low when the battery charger is in its prequalification and fast-charge states. chg goes high impedance if the thermistor causes the charger to go into temperature suspend mode. when used in conjunction with a microprocessor (p), connect a pullup resistor between chg and the logic i/o voltage to indicate charge status to the p. alternatively, chg can sink up to 20ma for an led charge indicator. fault output (flt ) flt is an ope n-drain, active-low output that indicates charger status. flt is low when the battery charger has entered a fault state when the charge timer expires. this can occur when the charger remains in its prequal state for more than 33 minutes or if the charger remains in fast-charge state for more than 660 minutes (see figure 6). to exit this fault state, toggle cen or remove and reconnect the input source. when used in conjunction with a microprocessor (p), connect a pullup resistor between flt and the logic i/o voltage to indicate charge status to the p. alternatively, flt can sink up to 20ma for an led fault indicator. if the flt output is not required, connect flt to ground or leave unconnected. 1.5 0 monitoring the battery charge current with v iset 0 1200v/r iset battery charging current (a) discharging v iset (v) figure 5. monitoring the battery charge current with the voltage from iset to gnd maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 19 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 19 19
?6maX8903A??? ???????? max8903_? ??50%????? 2???20% ?????bat?? v batreg (???)?? ?? 2ali+dc-dc usb?? charge timer a fault timer prevents the battery from charging indefi- nitely. the fault prequal and fast-charge timers are con- trolled by the capacitance at ct (c ct ). t c f t c prequal ct fst chg ct = = 33 0 15 660 min . min - 0 0 15 15 8903 . ( / / / / / ) f t s max a d h j n y t top off to - = p p off ct c f max b e g - = 1 32 0 15 8903 m in . ( //) fault uok and/or dok = low chg = high impedance flt = low i chg = 0ma prequalification uok and/or dok = low chg = low flt = high impedance 0 < v bat < v batpq i chg i chgmax /10 done uok and/or dok = 0 chg = high impedance flt = high impedance v batreg + v rstrt < v bat < v batreg i chg = 0ma fast-charge uok and/or dok = low chg = low flt = high impedance v batpq < v bat < v batreg i chg i chgmax not ready uok and dok = high impedance chg = high impedance flt = high impedance i chg = 0ma timer > t prequal v b at > v batpq reset timer v b at < v batpq - 180mv reset timer = 0 i chg < i term and v bat = v batreg and thermal or input limit not exceeded; reset timer i chg > i term reset timer v bat < v batreg + v rstrt reset timer timer > t top-off uok and/or dok = low cen = 0 reset timer cen = hi or remove and reconnect the input source(s) any s tate toggle cen or remove and reconnect the input source(s) timer > t fstchg (timer slowed by 2x if i chg < i chgmax /2, and paused if i chg < i chgmax /5 while v bat < v batreg ) top-off uok and/or dok = low chg = high impedance flt = high impedance v b at = v batreg i chg = i term temperature suspend i chg = 0ma uok or dok previous s tate chg = high impedance flt = high impedance any charging s tate thm not ok timer suspend thm ok timer resume v b at < v batpq - 180mv reset timer figure 6. maX8903A charger state flow chart maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 20 maX8903A-e/g/h/j/n/y 2ali+dc-dc usb?? 20 _____________________________________________________ charge timer a fault timer prevents the battery from charging indefi- nitely. the fault prequal and fast-charge timers are con- trolled by the capacitance at ct (c ct ). t c f t c prequal ct fst chg ct = = 33 0 15 660 min . min - 0 0 15 15 8903 . ( / / / / / ) f t s max a d h j n y t top off to - = p p off ct c f max b e g - = 1 32 0 15 8903 m in . ( //) fault uok and/or dok = low chg = high impedance flt = low i chg = 0ma prequalif n uok and/or ow chg = flt = high i ce 0 < v bat < i chg i ch done uok and/or dok = 0 chg = high impedance flt = high impedance v batreg + v rstrt < v bat < v batreg i chg = 0ma fast-ch uok and/or ow chg = flt = high im ce v batpq < v bat < v batreg i chg i chgmax not re uok and dok = hi dance chg = high i ce flt = high im ce i chg = timer > t prequal b at > v batpq eset timer v b at < v batpq - 180mv reset timer = 0 i chg < i term and v bat = v batreg and thermal or input limit not exceeded; reset timer i chg > i term reset timer v bat < v batreg + v rstrt reset timer timer > t top-off k and/or dok = low n = 0 set timer cen = hi or remove and reconnect the input source(s) any s tate toggle cen or remove and reconnect the input source(s) timer > t fstchg (timer slowed by 2x if i chg < i chgmax /2, and paused if i chg < i chgmax /5 while v bat < v batreg ) top-off uok and/or dok = low chg = high impedance flt = high impedance v b at = v batreg i chg = i term temperature suspend i chg = 0ma uok or dok previous s tate chg = high impedance flt = high impedance any charging s tate thm not ok timer suspend thm ok timer resume v b at < v batpq - 180mv reset timer figure 6. maX8903A charger state flow chart maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 20 2ali + dc-dc usb?? 20 maxim integrated 20 maX8903A-e/g/h/j/n/y
?7 3???? vl? vl?5v??max8903? ?bst?vl????? vlusbdc?usbdc? ??vldc?usbdc? 1.5v?vl??????vl ????(cen = ??)?vl? ??vlgnd??1 f? (thm) thm????(ntc)k ????????? ???????? ?????? ???N????? ?thmgnd??3? ????? thmvl??? ??(r tb ?7)10k ( + 25 c?) ???? + 25 c??? ? + 25 c?10k kr tb ?10k t + 25 c?100k k?100k ??10k ( + 25 c?)10k r tb k ?3.97k ()28.7k ( )??????? ?3500 10k ntck??0 c + 50 c ?????? 2ali+dc-dc usb?? while in fast-charge mode, a large system load or device self-heating may cause the max8903_ to reduce charge current. under these circumstances, the fast-charge timer is slowed by 2x if the charge current drops below 50% of the programmed fast-charge level, and suspend- ed if the charge current drops below 20% of the pro- grammed level. the fast-charge timer is not affected at any current if the charger is regulating the bat voltage at v batreg (i.e., the charger is in voltage mode). vl regulator vl is a 5v linear regulator that powers the max8903s internal circuitry and charges the bst capacitor. vl is used externally to bias the batterys thermistor. vl takes its input power from usb or dc. when input power is available from both usb and dc, vl takes power from dc. vl is enabled whenever the input voltage at usb or dc is greater than ~1.5v. vl does not turn off when t h e input voltage is above the overvoltage threshold. similarly, vl does not turn off when the charger is dis- abled ( cen = high). connect a 1f ceramic capacitor from vl to gnd. thermistor input (thm) the thm input connects to an external negative tem- perature coefficient (ntc) thermistor to monitor battery or system temperature. charging is suspended when the thermistor temperature is out of range. the charge timers are suspended and hold their state but no fault is indicated. when the thermistor comes back into range, charging resumes and the charge timer continues from where it left off. connecting thm to gnd disables the thermistor monitoring function. table 3 lists the fault temperature of different thermistors. since the thermistor monitoring circuit employs an exter- nal bias resistor from thm to vl (r tb , figure 7), the ther- mistor is not limited only to 10k? (at +25c). any resistance thermistor can be used as long as the value is equivalent to the thermistors +25c resistance. for example, with a 10k? at +25c thermistor, use 10k? at r tb , and with a 100k? at +25c thermistor, use 100k? . for a typical 10k? (at +25c) thermistor and a 10k? r tb resistor, the charger enters a temperature suspend state when the thermistor resistance falls below 3.97k? thm gnd thm out of range disable charger vl cen vl 0.74 vl 0.87 vl 0.28 vl 0.03 vl cold hot r tb thermistor circuitry thermistor detector max8903b/max8903e/ max8903g only enable thm r t r ts r tp alternate thermistor connection r t all comparators 60mv hysteresis max8903_ thermistor (k) 3000 3250 3500 3750 4250 r tb (k ? ) (figure 7) 10 10 10 10 10 resistance at +25c (k ? ) 10 10 10 10 10 resistance at +50c (k ? ) 4.59 4.30 4.03 3.78 3.316 resistance at 0c (k ? ) 25.14 27.15 29.32 31.66 36.91 nominal hot trip temperature (c) 55 53 50 49 46 nominal cold trip temperature (c) -3 -1 0 2 4.5 table 3. fault temperatures for different maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 21 2ali+dc-dc usb?? while in fast-charge mode, a large system load or device self-heating may cause the max8903_ to reduce charge current. under these circumstances, the fast-charge timer is slowed by 2x if the charge current drops below 50% of the programmed fast-charge level, and suspend- ed if the charge current drops below 20% of the pro- grammed level. the fast-charge timer is not affected at any current if the charger is regulating the bat voltage at v batreg (i.e., the charger is in voltage mode). vl regulator vl is a 5v linear regulator that powers the max8903s internal circuitry and charges the bst capacitor. vl is used externally to bias the batterys thermistor. vl takes its input power from usb or dc. when input power is available from both usb and dc, vl takes power from dc. vl is enabled whenever the input voltage at usb or dc is greater than ~1.5v. vl does not turn off when t h e input voltage is above the overvoltage threshold. similarly, vl does not turn off when the charger is dis- abled ( cen = high). connect a 1f ceramic capacitor from vl to gnd. thermistor input (thm) the thm input connects to an external negative tem- perature coefficient (ntc) thermistor to monitor battery or system temperature. charging is suspended when the thermistor temperature is out of range. the charge timers are suspended and hold their state but no fault is indicated. when the thermistor comes back into range, charging resumes and the charge timer continues from where it left off. connecting thm to gnd disables the thermistor monitoring function. table 3 lists the fault temperature of different thermistors. since the thermistor monitoring circuit employs an exter- nal bias resistor from thm to vl (r tb , figure 7), the ther- mistor is not limited only to 10k? (at +25c). any resistance thermistor can be used as long as the value is equivalent to the thermistors +25c resistance. for example, with a 10k? at +25c thermistor, use 10k? at r tb , and with a 100k? at +25c thermistor, use 100k? . for a typical 10k? (at +25c) thermistor and a 10k? r tb resistor, the charger enters a temperature suspend state when the thermistor resistance falls below 3.97k? thm gnd thm out of range disable charger vl cen vl 0.74 vl 0.87 vl 0.28 vl 0.03 vl cold hot r tb thermistor circuitry thermistor detector max8903b/max8903e/ max8903g only enable thm r t r ts r tp alternate thermistor connection r t all comparators 60mv hysteresis max8903_ thermistor (k) 3000 3250 3500 3750 4250 r tb (k ? ) (figure 7) 10 10 10 10 10 resistance at +25c (k ? ) 10 10 10 10 10 resistance at +50c (k ? ) 4.59 4.30 4.03 3.78 3.316 resistance at 0c (k ? ) 25.14 27.15 29.32 31.66 36.91 nominal hot trip temperature (c) 55 53 50 49 46 nominal cold trip temperature (c) -3 -1 0 2 4.5 table 3. fault temperatures for different maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 21 max 03a-e/g/h/j/n/y 2ali+dc-dc usb?? 22 ______________________________________________________________________________________ (too hot) or rises above 28.7k (too cold). this corre- sponds to a 0c to +50c range when using a 10k ntc thermistor with a beta of 3500. the general relation of thermistor resistance to temperature is defined by the following equation: where: r t = the resistance in of the thermistor at tempera- ture t in celsius r 25 = the resistance in of the thermistor at +25c cally ranges from 3000k to 5000k t = the temperature of the thermistor in c table 3 shows the max8903_ thm temperature limits for different thermistor material constants. some designs might prefer other thermistor temperature limits. threshold adjustment can be accommodated by changing r tb , connecting a resistor in series and/or in parallel with the thermistor, or using a thermistor with dif- ferent b . for example, a +45c hot threshold and 0c cold threshold can be realized by using a thermistor with a b of 4250 and connecting 120k in parallel. since the thermistor resistance near 0c is much higher than it is near +50c, a large parallel resistance lowers the cold threshold, while only slightly lowering the hot threshold. conversely, a small series resistance raises the hot threshold, while only slightly raising the cold threshold. raising r tb lowers both the cold and hot thresholds, while lowering r tb raises both thresholds. note that since vl is active whenever valid input power is connected at dc or usb, thermistor bias current flows at all times, even when charging is disabled ( cen = high). when using a 10k thermistor and a 10k pullup to vl, this results in an additional 250a load. this load can be reduced to 25a by instead using a 100k thermistor and 100k pullup resistor. power enable on battery detection the power enabled on battery detection function allows the max8903b/max8903e/max8903g to automatically enable/disable the usb and dc power inputs when the battery is applied/removed. this function utilizes the battery packs integrated thermistor as a sensing mech- anism to determine when the battery is applied or removed. with this function, max8903b/max8903e/ max8903g-based systems shut down when the battery is rem o ved regardless of whether external power is available at the usb or dc power inputs. the max8903b/max8903e/max8903g implement the power enabled on battery detection function with the ther- mistor detector comparator as shown in figure 7. if no bat- tery is pres ent, the absence of the thermistor allows r tb to pull thm to vl. when the voltage at the thm pin increases above 87% of vl, it is assumed that the battery has been removed and the system powers down. however, there is also the option to bypass this thermistor sensing option completely, and so retain the ability to remove the battery and let the system continue to operate with external power. if the thm pin is tied to gnd (voltage at thm is below 3% of vl), the thermistor option is disabled and the system does not respond to the thermistor input. in those cases, it is assumed that the system has its own temperature sens- ing, and halts changing through cen when the tempera- ture is outside of the safe charging range. minimum sys output capacitor based on the version of the max8903_, the sys load regulation is either 25mv/a or 40mv/a. the 25mv/a ver- sions achieve better load regulation by increasing the feedback loop gain. to ensure feedback stability with this higher gain, a larger sys output capacitor is required. devices with 25m/v sys load regulation require 22f sys output capacitor whereas devices with 40m/v only require 10f. see table 6 for more information about the various versions of the max8903_. inductor selection for step-down dc-dc regulator the max8903_'s control scheme requires an external inductor (l out ) from 1.0h to 10h for proper opera- tion. this section describes the control scheme and the considerations for inductor selection. table 5 shows recommended inductors for typical applications. for assistance with the calculations needed to select the optimum inductor for a given application, refer to the spreadsheet at: www.maxim-ic.com/tools/other/ rr e t tc c = + ? ? ? ? ? ? ? ? ? ? ? ? ? 25 1 273 1 298 ?? ? 28-pin 4mm x 4mm thin qfn single-layer pcb multilayer pcb continuous power dissipation 1666.7mw derate 20.8mw/c above +70c 2286mw derate 28.6mw/c above +70c ja 48c/w 35c/w jc 3c/w 3c/w maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 22 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 21 21
? r t = ??t (?)??( ) r 25 = + 25 c??( ) = ???3000k5000k t = ??( c) 3????max8903_ thm ?? ??????r tb ?/? ?? k????? ? ?4250k?120k ?k?? + 45 c??0 c??? 0 c??? + 50 c??? ???????? ???? ?r tb ?????r tb ? ?????dcusb?? ?(cen = ??)vl? ???10k kvl10k ?250 a??100k 100k k???25 a ???? ??????max8903b/max8903e/ max8903g? / ? ? / usbdc ?????? ????????? max8903b/max8903e/max8903g???? ???usbdc?????? max8903b/max8903e/max8903g? ?????????7? ?????kthm?r tb vlthm??vl87%? ????????? ???? ??thmgnd (thm ??vl3%)???? ????? ???????? ?? cen??? 4. ? sys max8903_??sys??25mv/a 40mv/a25mv/a? ????????? ???sys?25mv/a sys ???22 f sys?40mv/a sys??? 10 f sys? max8903_???6 dc-dc??? max8903_?????1.0 h10 h? (l out )??????? ?5????? ?????? ??? china.maxim-ic.com/design/ tools/calculators/files/max8903-inductor- design.xls max8903 dc-dc?? ?(f sw ) ??????? ??????(t offmin )? ??f sw ?????? t??t offmin ???? ???????(t onmin ) ????f sw ?? ?????? f sw = 4mhzmax8903?l out ??(5v9v)????? (12v)??f sw = 1mhzmax8903g? ?? /h/j/n/y 2ali+dc-dc usb?? 22 ______________________________________________________________________________________ (too hot) or rises above 28.7k (too cold). this corre- sponds to a 0c to +50c range when using a 10k ntc thermistor with a beta of 3500. the general relation of thermistor resistance to temperature is defined by the following equation: where: r t = the resistance in of the thermistor at tempera- ture t in celsius r 25 = the resistance in of the thermistor at +25c b = the material constant of the thermistor, which typi- cally ranges from 3000k to 5000k t = the temperature of the thermistor in c table 3 shows t he max8903_ thm temperature limits for different thermistor material constants. some designs might prefer other thermistor temperature limits. threshold adjustment can be accommodated by changing r tb , connecting a resistor in series and/or in parallel with the thermistor, or using a thermistor with dif- ferent b . for example, a +45c hot threshold and 0c cold threshold can be realized by using a thermistor with a b of 4250 and connecting 120k in parallel. since the thermistor resistance near 0c is much higher than it is near +50c, a large parallel resistance lowers the cold threshold, while only slightly lowering the hot threshold. conversely, a small series resistance raises the hot threshold, while only slightly raising the cold threshold. raising r tb lowers both the cold and hot thresholds, while lowering r tb raises both thresholds. note that since vl is active whenever valid input power is connected at dc or usb, thermistor bias current flows at all times, even when charging is disabled ( cen = high). when using a 10k thermistor and a 10k pullup to vl, this results in an additional 250a load. this load can be reduced to 25a by instead using a 100k thermistor and 100k pullup resistor. power enable on battery detection the power enabled on battery detection function allows the max8903b/max8903e/max8903g to automatically enable/disable the usb and dc power inputs when the battery is applied/removed. this function utilizes the battery packs integrated thermistor as a sensing mech- anism to determine when the battery is applied or removed. with this function, max8903b/max8903e/ max8903g-based systems shut down when the battery is remov e d regardless of whether external power is available at the usb or dc power inputs. the max8903b/max8903e/max8903g implement the power enabled on battery detection function with the ther- mistor detector comparator as shown in figure 7. if no bat- tery is pres ent, the absence of the thermistor allows r tb to pull thm to vl. when the voltage at the thm pin increases above 87% of vl, it is assumed that the battery has been removed and the system powers down. however, there is also the option to bypass this thermistor sensing option completely, and so retain the ability to remove the battery and let the system continue to operate with external power. if the thm pin is tied to gnd (voltage at thm is below 3% of vl), the thermistor option is disabled and the system does not respond to the thermistor input. in those cases, it is assumed that the system has its own temperature sens- ing, and halts changing through cen when the tempera- ture is outside of the safe charging range. minimum sys output capacitor based on the version of the max8903_, the sys load regulation is either 25mv/a or 40mv/a. the 25mv/a ver- sions achieve b etter load regulation by increasing the feedback loop gain. to ensure feedback stability with this higher gain, a larger sys output capacitor is required. devices with 25m/v sys load regulation require 22f sys output capacitor whereas devices with 40m/v only require 10f. see table 6 for more information about the various versions of the max8903_. inductor selection for step-down dc-dc regulator the max8903_'s control scheme requires an external inductor (l out ) from 1.0h to 10h for proper opera- tion. this section describes the control scheme and the considerations for inductor selection. table 5 shows recommended inductors for typical applications. for assistance with the calculations needed to select the optimum inductor for a given application, refer to the spreadsheet at: www.maxim-ic.com/tools/other/ rr e t tc c = + ? ? ? ? ? ? ? ? ? ? ? ? ? 25 1 273 1 298 ?? ? 28-pin 4mm x 4mm thin qfn single-layer pcb multilayer pcb continuous power dissipation 1666.7mw derate 20.8mw/c above +70c 2286mw derate 28.6mw/c above +70c ja 48c/w 35c/w jc 3c/w 3c/w maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 22 2ali + dc-dc usb?? 22 maxim integrated 22 maX8903A-e/g/h/j/n/y
???? f sw ????? ???????t offmin ????a??? ???????? ???????? ??(i l_ripple_min )?150ma ?(1)?(2)?l out_max (1) t off ????v sys(max) ?? ?v dc(min) ??? (2) l out_max ?? ????????f sw ? ????? ??k?(2)(3)(4)??? ?????l out l out ??6 ?(2a i sdlim 1a)? ????(0.2 k 0.45) (3) t off ?(1)???? (4) v dc(max) ??v sys(min) ? ??t on ???????? ? (5) ???(i sat )?? ?(i sdlim )???????(6)? (6) il ripple_max ??(7)(8)?? ??? (7) (8) pcb?? ?????????? ?????????gnd pg???????? ??????isetidc ???gndgnd? ?ic???????? ic??dcsysbatusb?? ?ic????? ?dcsysbat?pcb? maX8903A? maX8903A-e/g/h/j/n/y 2ali+dc-dc usb?? ______________________________________________________________________________________ 23

. the max8903 step-down dc-dc regulator implements a control scheme that typically results in a constant switch- ing frequency (f sw ). when the input voltage decreases to a value near the output voltage, high duty cycle operation occurs and the device can operate at less than f sw due to minimum off-time (t offmin ) constraints. in high duty cycle operation, the regulator operates with t offmin and a peak current regulation. similarly, when the input voltage is too high to allow f sw operation due to minimum on-time constraints (t onmin ), the regulator becomes a fixed minimum on-time valley current regulator. versions of the max8903 with f sw = 4mhz offer the smallest l out while delivering good efficiency with low input voltages (5v or 9v). for applications that use high input voltages (12v), the max8903g with f sw = 1mhz is the best choice because of its higher efficiency. for a given maximum output voltage, the minimum inductor ripple current condition occurs at the lowest input voltage that allows the regulator to maintain f sw operation. if the minimum input voltage dictates an off- time less than t offmin , then the minimum inductor rip- ple condition occurs just before the regulator enters fixed minimum off-time operation. to allow the current- mode regulator to provide a low-jitter, stable duty factor operation, the minimum inductor ripple current (i l_ripple_min ) should be greater than 150ma in the minimum inductor ripple current condition. the maxi- mum allowed output inductance l out_max is therefore obtained using the equations (1) and (2) below. (1) otherwise, where t off is the off-time, v sys(max) is maximum charger output voltage, and v dc(min) is minimum dc input volt- age. (2) where l out_max is the maximum allowed inductance. to obtain a small-sized inductor with acceptable core loss, while providing stable, jitter-free operation at the advertised f sw , the actual output inductance (l out ), is obtained by choosing an appropriate ripple factor k, and picking an available inductor in the range inductance yielded by equations (2), (3), and (4). l out should also not be lower than the minimum allowable inductance as shown in table 6. the recommended ripple factor ranges from (0.2 ? k 0.45) for (2a ? i s dlim ? 1a) designs. (3) where t off is the minimum off-time obtained from (1). (4) where v dc(max) is maximum input voltage, v sys(min) is the minimum charger output voltage, and t on is the on- time at high input voltage, as given by the following equation: (5) otherwise, the saturation curre nt dc rating of the inductor (i sat ) must be greater than the dc step-down output current limit (i sdlim ) plus one-half the maximum ripple current, as given by equation (6). (6) where il ripple_max is the greater of the ripple currents obtained from (7) and (8). (7) (8) pcb layout and routing good design minimizes ground bounce and voltage gra- dients in the ground plane, which can result in instability or regulation errors. the gnd and pgs should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. battery ground should connect directly to the power-ground plane. the iset and idc current-setting resistors should connect directly il vv t l ripple min t dc max sys min on o on __ ( ) () = () ? uut il vt l ripple min t sys max off out off __ () = t t if v v off offmin sys max dc min = ? ? ? ? ? ? ? () () 1 = 1 f t sw offmin o , ( ( = ? ? ? 1t v v off sys max dc min , () () ?? ? ? ? 1 f sw ii il sat sdlim ripple max >+ _ 2 ? () 1 = t t v vf o on sys min dc max sw , () () 1 l vt i out max sys max off l ripple min _ () __ = ) ) ? ??=? ?=? ? ?>+ = ? ? ? ? ? ? () () 1 ? t onmin o , l vv t k out min t d c max sys min on on __ ( ) () = () ? ii sdlim l vt ki o ut min t sys max off sdlim off _ _ () = maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 23 maX8903A-e/g/h/j/n/y 2ali+dc-dc usb?? ______________________________________________________________________________________ 23

. the max8903 step-down dc-dc regulator implements a control scheme that typically results in a constant switch- ing frequency (f sw ). when the input voltage decreases to a value near the output voltage, high duty cycle operation occurs and the device can operate at less than f sw due to minimum off-time (t offmin ) constraints. in high duty cycle operation, the regulator operates with t offmin and a peak current regulation. similarly, when the input voltage is too high to allow f sw operation due to minimum on-time constraints (t onmin ), the regulator becomes a fixed minimum on-time valley current regulator. versions of the max8903 with f sw = 4mhz offer the smallest l out while delivering good efficiency with low input voltages (5v or 9v). for applications that use high input voltages (12v), the max8903g with f sw = 1mhz is the best choice because of its higher efficiency. for a given maximum output voltage, the minimum inductor ripple current condition occurs at the lowest input voltage that allows the regulator to maintain f sw operation. if the minimum input voltage dictates an off- time less than t offmin , then the minimum inductor rip- ple condition occurs just before the regulator enters fixed minimum off-time operation. to allow the current- mode regulator to provide a low-jitter, stable duty factor operation, the minimum inductor ripple current (i l_ripple_min ) should be greater than 150ma in the minimum inductor ripple current condition. the maxi- mum allowed output inductance l out_max is therefore obtained using the equations (1) and (2) below. (1) otherwise, where t off is the off-time, v sys(max) is maximum charger output voltage, and v dc(min) is minimum dc input volt- age. (2) where l out_max is the maximum allowed inductance. to obtain a small-sized inductor with acceptable core loss, while providing stable, jitter-free operation at the advertised f sw , the actual output inductance (l out ), is obtained by choosing an appropriate ripple factor k, and picking an available inductor in the range inductance yielded by equations (2), (3), and (4). l out should also not be lower than the minimum allowable inductance as shown in table 6. the recommended ripple factor ranges from (0.2 ? k 0.45) for (2a ? i s dlim ? 1a) designs. (3) where t off is the minimum off-time obtained from (1). (4) where v dc(max) is maximum input voltage, v sys(min) is the minimum charger output voltage, and t on is the on- time at high input voltage, as given by the following equation: (5) otherwise, the saturation curre nt dc rating of the inductor (i sat ) must be greater than the dc step-down output current limit (i sdlim ) plus one-half the maximum ripple current, as given by equation (6). (6) where il ripple_max is the greater of the ripple currents obtained from (7) and (8). (7) (8) pcb layout and routing good design minimizes ground bounce and voltage gra- dients in the ground plane, which can result in instability or regulation errors. the gnd and pgs should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. battery ground should connect directly to the power-ground plane. the iset and idc current-setting resistors should connect directly il vv t l ripple min t dc max sys min on o on __ ( ) () = () ? uut il vt l ripple min t sys max off out off __ () = t t if v v off offmin sys max dc min = ? ? ? ? ? ? ? () () 1 = 1 f t sw offmin o , ( ( = ? ? ? 1t v v off sys max dc min , () () ?? ? ? ? 1 f sw ii il sat sdlim ripple max >+ _ 2 ? () 1 = t t v vf o on sys min dc max sw , () () 1 l vt i out max sys max off l ripple min _ () __ = ) ) ? ??=? ?=? ? ?>+ = ? ? ? ? ? ? () () 1 ? t onmin o , l vv t k out min t d c max sys min on on __ ( ) () = () ? ii sdlim l vt ki o ut min t sys max off sdlim off _ _ () = maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 23 maX8903A-e/g/h/j/n/y 2ali+dc-dc usb?? ______________________________________________________________________________________ 23

. the max8903 step-down dc-dc regulator implements a control scheme that typically results in a constant switch- ing frequency (f sw ). when the input voltage decreases to a value near the output voltage, high duty cycle operation occurs and the device can operate at less than f sw due to minimum off-time (t offmin ) constraints. in high duty cycle operation, the regulator operates with t offmin and a peak current regulation. similarly, when the input voltage is too high to allow f sw operation due to minimum on-time constraints (t onmin ), the regulator becomes a fixed minimum on-time valley current regulator. versions of the max8903 with f sw = 4mhz offer the smallest l out while delivering good efficiency with low input voltages (5v or 9v). for applications that use high input voltages (12v), the max8903g with f sw = 1mhz is the best choice because of its higher efficiency. for a given maximum output voltage, the minimum inductor ripple current condition occurs at the lowest input voltage that allows the regulator to maintain f sw operation. if the minimum input voltage dictates an off- time less than t offmin , then the minimum inductor rip- ple condition occurs just before the regulator enters fixed minimum off-time operation. to allow the current- mode regulator to provide a low-jitter, stable duty factor operation, the minimum inductor ripple current (i l_ripple_min ) should be greater than 150ma in the minimum inductor ripple current condition. the maxi- mum allowed output inductance l out_max is therefore obtained using the equations (1) and (2) below. (1) otherwise, where t off is the off-time, v sys(max) is maximum charger output voltage, and v dc(min) is minimum dc input volt- age. (2) where l out_max is the maximum allowed inductance. to obtain a small-sized inductor with acceptable core loss, while providing stable, jitter-free operation at the advertised f sw , the actual output inductance (l out ), is obtained by choosing an appropriate ripple factor k, and picking an available inductor in the range inductance yielded by equations (2), (3), and (4). l out should also not be lower than the minimum allowable inductance as shown in table 6. the recommended ripple factor ranges from (0.2 ? k 0.45) for (2a ? i s dlim ? 1a) designs. (3) where t off is the minimum off-time obtained from (1). (4) where v dc(max) is maximum input voltage, v sys(min) is the minimum charger output voltage, and t on is the on- time at high input voltage, as given by the following equation: (5) otherwise, the saturation curre nt dc rating of the inductor (i sat ) must be greater than the dc step-down output current limit (i sdlim ) plus one-half the maximum ripple current, as given by equation (6). (6) where il ripple_max is the greater of the ripple currents obtained from (7) and (8). (7) (8) pcb layout and routing good design minimizes ground bounce and voltage gra- dients in the ground plane, which can result in instability or regulation errors. the gnd and pgs should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. battery ground should connect directly to the power-ground plane. the iset and idc current-setting resistors should connect directly il vv t l ripple min t dc max sys min on o on __ ( ) () = () ? uut il vt l ripple min t sys max off out off __ () = t t if v v off offmin sys max dc min = ? ? ? ? ? ? ? () () 1 = 1 f t sw offmin o , ( ( = ? ? ? 1t v v off sys max dc min , () () ?? ? ? ? 1 f sw ii il sat sdlim ripple max >+ _ 2 ? () 1 = t t v vf o on sys min dc max sw , () () 1 l vt i out max sys max off l ripple min _ () __ = t t if v vf on onmin sys min dc max sw = ? ? ? ? ? ? () () 1 ? t onmin o , l vv t k out min t d c max sys min on on __ ( ) () = () ? ii sdlim l vt ki o ut min t sys max off sdlim off _ _ () = maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 23 maX8903A-e/g/h/j/n/y 2ali+dc-dc usb?? ______________________________________________________________________________________ 23

. the max8903 step-down dc-dc regulator implements a control scheme that typically results in a constant switch- ing frequency (f sw ). when the input voltage decreases to a value near the output voltage, high duty cycle operation occurs and the device can operate at less than f sw due to minimum off-time (t offmin ) constraints. in high duty cycle operation, the regulator operates with t offmin and a peak current regulation. similarly, when the input voltage is too high to allow f sw operation due to minimum on-time constraints (t onmin ), the regulator becomes a fixed minimum on-time valley current regulator. versions of the max8903 with f sw = 4mhz offer the smallest l out while delivering good efficiency with low input voltages (5v or 9v). for applications that use high input voltages (12v), the max8903g with f sw = 1mhz is the best choice because of its higher efficiency. for a given maximum output voltage, the minimum inductor ripple current condition occurs at the lowest input voltage that allows the regulator to maintain f sw operation. if the minimum input voltage dictates an off- time less than t offmin , then the minimum inductor rip- ple condition occurs just before the regulator enters fixed minimum off-time operation. to allow the current- mode regulator to provide a low-jitter, stable duty factor operation, the minimum inductor ripple current (i l_ripple_min ) should be greater than 150ma in the minimum inductor ripple current condition. the maxi- mum allowed output inductance l out_max is therefore obtained using the equations (1) and (2) below. (1) otherwise, where t off is the off-time, v sys(max) is maximum charger output voltage, and v dc(min) is minimum dc input volt- age. (2) where l out_max is the maximum allowed inductance. to obtain a small-sized inductor with acceptable core loss, while providing stable, jitter-free operation at the advertised f sw , the actual output inductance (l out ), is obtained by choosing an appropriate ripple factor k, and picking an available inductor in the range inductance yielded by equations (2), (3), and (4). l out should also not be lower than the minimum allowable inductance as shown in table 6. the recommended ripple factor ranges from (0.2 ? k 0.45) for (2a ? i s dlim ? 1a) designs. (3) where t off is the minimum off-time obtained from (1). (4) where v dc(max) is maximum input voltage, v sys(min) is the minimum charger output voltage, and t on is the on- time at high input voltage, as given by the following equation: (5) otherwise, limit (i sdlim ) plus one-half the maximum ripple current, as given by equation (6). (6) where il ripple_max is the greater of the ripple currents obtained from (7) and (8). (7) (8) pcb layout and routing good design minimizes ground bounce and voltage gra- dients in the ground plane, which can result in instability or regulation errors. the gnd and pgs should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. battery ground should connect directly to the power-ground plane. the iset and idc current-setting resistors should connect directly il vv t l ripple min t dc max sys min on o on __ ( ) () = () ? uut il vt l ripple min t sys max off out off __ () = t t if v v off offmin sys max dc min = ? ? ? ? ? ? ? () () 1 = 1 f t sw offmin o , ( ( = ? ? ? 1t v v off sys max dc min , () () ?? ? ? ? 1 f sw ii il sat sdlim ripple max >+ _ 2 ? () 1 = t t v vf o on sys min dc max sw , () () 1 l vt i out max sys max off l ripple min _ () __ = t t if v vf on onmin sys min dc max sw = ? ? ? ? ? ? () () 1 ? t onmin o , l vv t k out min t d c max sys min on on __ ( ) () = () ? ii sdlim l vt ki o ut min t sys max off sdlim off _ _ () = maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 23 maX8903A-e/g/h/j/n/y 2ali+dc-dc usb?? ______________________________________________________________________________________ 23

. the max8903 step-down dc-dc regulator implements a control scheme that typically results in a constant switch- ing frequency (f sw ). when the input voltage decreases to a value near the output voltage, high duty cycle operation occurs and the device can operate at less than f sw due to minimum off-time (t offmin ) constraints. in high duty cycle operation, the regulator operates with t offmin and a peak current regulation. similarly, when the input voltage is too high to allow f sw operation due to minimum on-time constraints (t onmin ), the regulator becomes a fixed minimum on-time valley current regulator. versions of the max8903 with f sw = 4mhz offer the smallest l out while delivering good efficiency with low input voltages (5v or 9v). for applications that use high input voltages (12v), the max8903g with f sw = 1mhz is the best choice because of its higher efficiency. for a given maximum output voltage, the minimum inductor ripple current condition occurs at the lowest input voltage that allows the regulator to maintain f sw operation. if the minimum input voltage dictates an off- time less than t offmin , then the minimum inductor rip- ple condition occurs just before the regulator enters fixed minimum off-time operation. to allow the current- mode regulator to provide a low-jitter, stable duty factor operation, the minimum inductor ripple current (i l_ripple_min ) should be greater than 150ma in the minimum inductor ripple current condition. the maxi- mum allowed output inductance l out_max is therefore obtained using the equations (1) and (2) below. (1) otherwise, where t off is the off-time, v sys(max) is maximum charger output voltage, and v dc(min) is minimum dc input volt- age. (2) where l out_max is the maximum allowed inductance. to obtain a small-sized inductor with acceptable core loss, while providing stable, jitter-free operation at the advertised f sw , the actual output inductance (l out ), is obtained by choosing an appropriate ripple factor k, and picking an available inductor in the range inductance yielded by equations (2), (3), and (4). l out should also not be lower than the minimum allowable inductance as shown in table 6. the recommended ripple factor ranges from (0.2 ? k 0.45) for (2a ? i s dlim ? 1a) designs. (3) where t off is the minimum off-time obtained from (1). (4) where v dc(max) is maximum input voltage, v sys(min) is the minimum charger output voltage, and t on is the on- time at high input voltage, as given by the following equation: (5) otherwise, limit (i sdlim ) plus one-half the maximum ripple current, as given by equation (6). (6) where il ripple_max is the greater of the ripple currents obtained from (7) and (8). (7) (8) pcb layout and routing good design minimizes ground bounce and voltage gra- dients in the ground plane, which can result in instability or regulation errors. the gnd and pgs should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. battery ground should connect directly to the power-ground plane. the iset and idc current-setting resistors should connect directly il vv t l ripple min t dc max sys min on o on __ ( ) () = () ? uut il vt l ripple min t sys max off out off __ () = t t if v v off offmin sys max dc min = ? ? ? ? ? ? ? () () 1 = 1 f t sw offmin o , ( ( = ? ? ? 1t v v off sys max dc min , () () ?? ? ? ? 1 f sw ii il sat sdlim ripple max >+ _ 2 ? () 1 = t t v vf o on sys min dc max sw , () () 1 l vt i out max sys max off l ripple min _ () __ = t t if v vf on onmin sys min dc max sw = ? ? ? ? ? ? () () 1 ? t onmin o , l vv t k out min t d c max sys min on on __ ( ) () = () ? ii sdlim l vt ki o ut min t sys max off sdlim off _ _ () = maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 23 maX8903A-e/g/h/j/n/ 2ali+dc-dc usb?? ______________________________________________________________________________________ 23

. the max8903 step-down dc-dc regulator implements a control scheme that typically results in a constant switch- ing frequency (f sw ). when the input voltage decreases to a value near the output voltage, high duty cycle operation occurs and the device can operate at less than f sw due to minimum off-time (t offmin ) constraints. in high duty cycle operation, the regulator operates with t offmin and a peak current regulation. similarly, when the input voltage is too high to allow f sw operation due to minimum on-time constraints (t onmin ), the regulator becomes a fixed minimum on-time valley current regulator. versions of the max8903 with f sw = 4mhz offer the smallest l out while delivering good efficiency with low input voltages (5v or 9v). for applications that use high input voltages (12v), the max8903g with f sw = 1mhz is the best choice because of its higher efficiency. for a given maximum output voltage, the minimum inductor ripple current condition occurs at the lowest input voltage that allows the regulator to maintain f sw operation. if the minimum input voltage dictates an off- time less than t offmin , then the minimum inductor rip- ple condition occurs just before the regulator enters fixed minimum off-time operation. to allow the current- mode regulator to provide a low-jitter, stable duty factor operation, the minimum inductor ripple current (i l_ripple_min ) should be greater than 150ma in the minimum inductor ripple current condition. the maxi- mum allowed output inductance l out_max is therefore obtained using the equations (1) and (2) below. (1) otherwise, where t off is the off-time, v sys(max) is maximum charger output voltage, and v dc(min) is minimum dc input volt- age. (2) where l out_max is the maximum allowed inductance. to obtain a small-sized inductor with acceptable core loss, while providing stable, jitter-free operation at the advertised f sw , the actual output inductance (l out ), is obtained by choosing an appropriate ripple factor k, and picking an available inductor in the range inductance yielded by equations (2), (3), and (4). l out should also not be lower than the minimum allowable inductance as shown in table 6. the recommended ripple factor ranges from (0.2 ? k 0.45) for (2a ? i s dlim ? 1a) designs. (3) where t off is the minimum off-time obtained from (1). (4) where v dc(max) is maximum input voltage, v sys(min) is the minimum charger output voltage, and t on is the on- time at high input voltage, as given by the following equation: (5) otherwise, the saturation curre nt dc rating of the inductor (i sat ) must be greater than the dc step-down output current limit (i sdlim ) plus one-half the maximum ripple current, as given by equation (6). (6) where il ripple_max is the greater of the ripple currents obtained from (7) and (8). (7) (8) pcb layout and routing good design minimizes ground bounce and voltage gra- dients in the ground plane, which can result in instability or regulation errors. the gnd and pgs should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. battery ground should connect directly to the power-ground plane. the iset and idc current-setting resistors should connect directly il vv t l ripple min t dc max sys min on o on __ ( ) () = () ? uut il vt l ripple min t sys max off out off __ () = t t if v v off offmin sys max dc min = ? ? ? ? ? ? ? () () 1 = 1 f t sw offmin o , ( ( = ? ? ? 1t v v off sys max dc min , () () ?? ? ? ? 1 f sw ii il sat sdlim ripple max >+ _ 2 ? () 1 = t t v vf o on sys min dc max sw , () () 1 l vt i out max sys max off l ripple min _ () __ = t t if v vf on onmin sys min dc max sw = ? ? ? ? ? ? () () 1 ? t onmin o , l vv t k out min t d c max sys min on on __ ( ) () = () ? ii sdlim l vt ki o ut min t sys max off sdlim off _ _ () = maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 23 maX8903A-e/g/h/j/n 2ali+dc-dc usb?? ______________________________________________________________________________________ 23

. the max8903 step-down dc-dc regulator implements a control scheme that typically results in a constant switch- ing frequency (f sw ). when the input voltage decreases to a value near the output voltage, high duty cycle operation occurs and the device can operate at less than f sw due to minimum off-time (t offmin ) constraints. in high duty cycle operation, the regulator operates with t offmin and a peak current regulation. similarly, when the input voltage is too high to allow f sw operation due to minimum on-time constraints (t onmin ), the regulator becomes a fixed minimum on-time valley current regulator. versions of the max8903 with f sw = 4mhz offer the smallest l out while delivering good efficiency with low input voltages (5v or 9v). for applications that use high input voltages (12v), the max8903g with f sw = 1mhz is the best choice because of its higher efficiency. for a given maximum output voltage, the minimum inductor ripple current condition occurs at the lowest input voltage that allows the regulator to maintain f sw operation. if the minimum input voltage dictates an off- time less than t offmin , then the minimum inductor rip- ple condition occurs just before the regulator enters fixed minimum off-time operation. to allow the current- mode regulator to provide a low-jitter, stable duty factor operation, the minimum inductor ripple current (i l_ripple_min ) should be greater than 150ma in the minimum inductor ripple current condition. the maxi- mum allowed output inductance l out_max is therefore obtained using the equations (1) and (2) below. (1) otherwise, where t off is the off-time, v sys(max) is maximum charger output voltage, and v dc(min) is minimum dc input volt- age. (2) where l out_max is the maximum allowed inductance. to obtain a small-sized inductor with acceptable core loss, while providing stable, jitter-free operation at the advertised f sw , the actual output inductance (l out ), is obtained by choosing an appropriate ripple factor k, and picking an available inductor in the range inductance yielded by equations (2), (3), and (4). l out should also not be lower than the minimum allowable inductance as shown in table 6. the recommended ripple factor ranges from (0.2 ? k 0.45) for (2a ? i s dlim ? 1a) designs. (3) where t off is the minimum off-time obtained from (1). (4) where v dc(max) is maximum input voltage, v sys(min) is the minimum charger output voltage, and t on is the on- time at high input voltage, as given by the following equation: (5) otherwise, the saturation curre nt dc rating of the inductor (i sat ) must be greater than the dc step-down output current limit (i sdlim ) plus one-half the maximum ripple current, as given by equation (6). (6) where il ripple_max is the greater of the ripple currents obtained from (7) and (8). (7) (8) pcb layout and routing good design minimizes ground bounce and voltage gra- dients in the ground plane, which can result in instability or regulation errors. the gnd and pgs should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. battery ground should connect directly to the power-ground plane. the iset and idc current-setting resistors should connect directly il vv t l ripple min t dc max sys min on o on __ ( ) () = () ? uut il vt l ripple min t sys max off out off __ () = t t if v v off offmin sys max dc min = ? ? ? ? ? ? ? () () 1 = 1 f t sw offmin o , ( ( = ? ? ? 1t v v off sys max dc min , () () ?? ? ? ? 1 f sw ii il sat sdlim ripple max >+ _ 2 ? () 1 = t t v vf o on sys min dc max sw , () () 1 l vt i out max sys max off l ripple min _ () __ = ) ) ? ??=? ?=? ? ?>+ = ? ? ? ? ? ? () () 1 ? t onmin o , l vv t k out min t d c max sys min on on __ ( ) () = () ? ii sdlim l vt ki o ut min t sys max off sdlim off _ _ () = maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 23 maX8903A-e/g/h/j/n 2ali+dc-dc usb?? ______________________________________________________________________________________ 23

. the max8903 step-down dc-dc regulator implements a control scheme that typically results in a constant switch- ing frequency (f sw ). when the input voltage decreases to a value near the output voltage, high duty cycle operation occurs and the device can operate at less than f sw due to minimum off-time (t offmin ) constraints. in high duty cycle operation, the regulator operates with t offmin and a peak current regulation. similarly, when the input voltage is too high to allow f sw operation due to minimum on-time constraints (t onmin ), the regulator becomes a fixed minimum on-time valley current regulator. versions of the max8903 with f sw = 4mhz offer the smallest l out while delivering good efficiency with low input voltages (5v or 9v). for applications that use high input voltages (12v), the max8903g with f sw = 1mhz is the best choice because of its higher efficiency. for a given maximum output voltage, the minimum inductor ripple current condition occurs at the lowest input voltage that allows the regulator to maintain f sw operation. if the minimum input voltage dictates an off- time less than t offmin , then the minimum inductor rip- ple condition occurs just before the regulator enters fixed minimum off-time operation. to allow the current- mode regulator to provide a low-jitter, stable duty factor operation, the minimum inductor ripple current (i l_ripple_min ) should be greater than 150ma in the minimum inductor ripple current condition. the maxi- mum allowed output inductance l out_max is therefore obtained using the equations (1) and (2) below. (1) otherwise, where t off is the off-time, v sys(max) is maximum charger output voltage, and v dc(min) is minimum dc input volt- age. (2) where l out_max is the maximum allowed inductance. to obtain a small-sized inductor with acceptable core loss, while providing stable, jitter-free operation at the advertised f sw , the actual output inductance (l out ), is obtained by choosing an appropriate ripple factor k, and picking an available inductor in the range inductance yielded by equations (2), (3), and (4). l out should also not be lower than the minimum allowable inductance as shown in table 6. the recommended ripple factor ranges from (0.2 ? k 0.45) for (2a ? i s dlim ? 1a) designs. (3) where t off is the minimum off-time obtained from (1). (4) where v dc(max) is maximum input voltage, v sys(min) is the minimum charger output voltage, and t on is the on- time at high input voltage, as given by the following equation: (5) otherwise, the saturation curre nt dc rating of the inductor (i sat ) must be greater than the dc step-down output current limit (i sdlim ) plus one-half the maximum ripple current, as given by equation (6). (6) where il ripple_max is the greater of the ripple currents obtained from (7) and (8). (7) (8) pcb layout and routing good design minimizes ground bounce and voltage gra- dients in the ground plane, which can result in instability or regulation errors. the gnd and pgs should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. battery ground should connect directly to the power-ground plane. the iset and idc current-setting resistors should connect directly il vv t l ripple min t dc max sys min on o on __ ( ) () = () ? uut il vt l ripple min t sys max off out off __ () = t t if v v off offmin sys max dc min = ? ? ? ? ? ? ? () () 1 = 1 f t sw offmin o , ( ( = ? ? ? 1t v v off sys max dc min , () () ?? ? ? ? 1 f sw ii il sat sdlim ripple max >+ _ 2 e () 1 = t t v vf o on sys min dc max sw , () () 1 l vt i out max sys max off l ripple min _ () __ = t t if v vf on onmin sys min dc max sw = ? ? ? ? ? ? () () 1 ? t onmin o , l vv t k out min t d c max sys min on on __ ( ) () = () ? ii sdlim l vt ki o ut min t sys max off sdlim off _ _ () = maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 23 maX8903A-e/g/h/j/ 2ali+dc-dc usb?? ______________________________________________________________________________________ 23

. the max8903 step-down dc-dc regulator implements a control scheme that typically results in a constant switch- ing frequency (f sw ). when the input voltage decreases to a value near the output voltage, high duty cycle operation occurs and the device can operate at less than f sw due to minimum off-time (t offmin ) constraints. in high duty cycle operation, the regulator operates with t offmin and a peak current regulation. similarly, when the input voltage is too high to allow f sw operation due to minimum on-time constraints (t onmin ), the regulator becomes a fixed minimum on-time valley current regulator. versions of the max8903 with f sw = 4mhz offer the smallest l out while delivering good efficiency with low input voltages (5v or 9v). for applications that use high input voltages (12v), the max8903g with f sw = 1mhz is the best choice because of its higher efficiency. for a given maximum output voltage, the minimum inductor ripple current condition occurs at the lowest input voltage that allows the regulator to maintain f sw operation. if the minimum input voltage dictates an off- time less than t offmin , then the minimum inductor rip- ple condition occurs just before the regulator enters fixed minimum off-time operation. to allow the current- mode regulator to provide a low-jitter, stable duty factor operation, the minimum inductor ripple current (i l_ripple_min ) should be greater than 150ma in the minimum inductor ripple current condition. the maxi- mum allowed output inductance l out_max is therefore obtained using the equations (1) and (2) below. (1) otherwise, where t off is the off-time, v sys(max) is maximum charger output voltage, and v dc(min) is minimum dc input volt- age. (2) where l out_max is the maximum allowed inductance. to obtain a small-sized inductor with acceptable core loss, while providing stable, jitter-free operation at the advertised f sw , the actual output inductance (l out ), is obtained by choosing an appropriate ripple factor k, and picking an available inductor in the range inductance yielded by equations (2), (3), and (4). l out should also not be lower than the minimum allowable inductance as shown in table 6. the recommended ripple factor ranges from (0.2 ? k 0.45) for (2a ? i s dlim ? 1a) designs. (3) where t off is the minimum off-time obtained from (1). (4) where v dc(max) is maximum input voltage, v sys(min) is the minimum charger output voltage, and t on is the on- time at high input voltage, as given by the following equation: (5) otherwise, the saturation curre nt dc rating of the inductor (i sat ) must be greater than the dc step-down output current limit (i sdlim ) plus one-half the maximum ripple current, as given by equation (6). (6) where il ripple_max is the greater of the ripple currents obtained from (7) and (8). (7) (8) pcb layout and routing good design minimizes ground bounce and voltage gra- dients in the ground plane, which can result in instability or regulation errors. the gnd and pgs should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. battery ground should connect directly to the power-ground plane. the iset and idc current-setting resistors should connect directly il vv t l ripple min t dc max sys min on o on __ ( ) () = () ? uut il vt l ripple min t sys max off out off __ () = t t if v v off offmin sys max dc min = ? ? ? ? ? ? ? () () 1 = 1 f t sw offmin o , ( ( = ? ? ? 1t v v off sys max dc min , () () ?? ? ? ? 1 f sw ii il sat sdlim ripple max >+ _ 2 ? () 1 = t t v vf o on sys min dc max sw , () () 1 l vt i out max sys max off l ripple min _ () __ = ) ) ? ??=? ?=? ? ?>+ = ? ? ? ? ? ? () () 1 ? t onmin o , l vv t k out min t d c max sys min on on __ ( ) () = () ? ii sdlim l vt ki o ut min t sys max off sdlim off _ _ () = maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 23 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 23 23
5. ?? /j/n/y 2ali+dc-dc usb?? 24 ______________________________________________________________________________________ dc input voltage r ange dc step-down output current limit (i sdmax ) part number, switching frequency* recommended inductor 5v 10% 2a max8903h/j/n/y, 4mhz 1.0h, ifsc1008aber1r0m01, vishay 2.5mm x 2mm x 1.2mm, 43m ? (max), 2.6a or 1.0h, lqh32pn1r0-nn0, murata, 3.2mm x 2.5mm x 1.55mm, 54m ? (max), 2.3a 5v 10% 1a max8903h/j/n/y, 4mhz 1.5h inductor, mdt2520-cn1r5m, toko 2.5mm x 2.0mm x 1.2mm, 123.5m ? (max), 1.25a or 1.5uh inductor, ifsc1008aber1r5m01, vishay 2.5mm x 2mm x 1.2mm, 72m ? (max), 2.2a 5v 10% 2a maX8903A/b/c/d/e, 4mhz 2.2h inductor, dfe322512c-2r2n, toko 3.2mm x 2.5mm x 1.2mm, 91m ? (max), 2.4a or 2.2h inductor, ifsc1515aher2r2m01, vishay 3.8mm x 3.8mm x 1.8mm, 45m ? (max), 3a 5v 10% 1a maX8903A/b/c/d/e, 4mhz 2.2h inductor, ifsc1008aber2r2m01, vishay 2.5mm x 2mm x 1.2mm, 90m ? (max), 2.15a or 2.2h inductor, lqh32pn2r2-nn0, murata 3.2mm x 2.5mm x 1.55mm, 91m ? (max), 1.55a 9v 10% 2a max8903h/j/n/y, 4mhz 1.5uh inductor, ifsc1008aber1r5m01, vishay 2.5mm x 2mm x 1.2mm, 72mw (max), 2.2a or 1.5h inductor, vls4012et-1r5n, tdk 4mm x 4mm x 1.2mm, 72mw (max), 2.1a 9v 10% 1a max8903h/j/n/y, 4mhz 2.2h inductor, ifsc1008aber2r2m01, vishay 2.5mm x 2mm x 1.2mm, 90m ? (max), 2.15a or 2.2h inductor, lqh3npn2r2nj0, murata 3mm x 3mm x 1.1mm, 83m ? (max), 1.15a to gnd to avoid current errors. connect gnd to the exposed pad directly under the ic. use multiple tightly spaced vias to the ground plane under the exposed pad to help cool the ic. position input capacitors from dc, sys, bat, and usb to the power-ground plane as close as possible to the ic. keep high current traces such as those to dc, sys, and bat as short and wide as possi- ble. refer to the maX8903A evaluation kit for a suitable maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 24 2ali + dc-dc usb?? 24 maxim integrated 24 maX8903A-e/g/h/j/n/y
5. ??() dc input voltage range dc step-down output current limit (i sdmax ) part number, switching frequency * recommended inductor 5v 10% 2a max8903h/j/n/y, 4mhz 1.0h, ifsc1008aber1r0m01, vishay 2.5mm x 2mm x 1.2mm, 43m ? (max), 2.6a or 1.0h, lqh32pn1r0-nn0, murata, 3.2mm x 2.5mm x 1.55mm, 54m ? (max), 2.3a 5v 10% 1a max8903h/j/n/y, 4mhz 1.5h inductor, mdt2520-cn1r5m, toko 2.5mm x 2.0mm x 1.2mm, 123.5m ? (max), 1.25a or 1.5uh inductor, ifsc1008aber1r5m01, vishay 2.5mm x 2mm x 1.2mm, 72m ? (max), 2.2a 5v 10% 2a maX8903A/b/c/d/e, 4mhz 2.2h inductor, dfe322512c-2r2n, toko 3.2mm x 2.5mm x 1.2mm, 91m ? (max), 2.4a or 2.2h inductor, ifsc1515aher2r2m01, vishay 3.8mm x 3.8mm x 1.8mm, 45m ? (max), 3a 5v 10% 1a maX8903A/b/c/d/e, 4mhz 2.2h inductor, ifsc1008aber2r2m01, vishay 2.5mm x 2mm x 1.2mm, 90m ? (max), 2.15a or 2.2h inductor, lqh32pn2r2-nn0, murata 3.2mm x 2.5mm x 1.55mm, 91m ? (max), 1.55a 9v 10% 2a max8903h/j/n/y, 4mhz 1.5uh inductor, ifsc1008aber1r5m01, vishay 2.5mm x 2mm x 1.2mm, 72mw (max), 2.2a or 1.5h inductor, vls4012et-1r5n, tdk 4mm x 4mm x 1.2mm, 72mw (max), 2.1a 9v 10% 1a max8903h/j/n/y, 4mhz 2.2h inductor, ifsc1008aber2r2m01, vishay 2.5mm x 2mm x 1.2mm, 90m ? (max), 2.15a or 2.2h inductor, lqh3npn2r2nj0, murata 3mm x 3mm x 1.1mm, 83m ? (max), 1.15a dc input voltage range dc step-down output current limi t (i sdmax ) part number, switching frequency * recommended inductor 9v 10% 2a maX8903A/b/c/d/e, 4mhz 2.2h inductor, dfe322512c-2r2n, toko 3.2mm x 2.5mm x 1.2mm, 91m ? (max), 2.4a or 2.2h inductor, ifsc1515aher2r2m01, vishay 3.8mm x 3.8mm x 1.8mm, 45m ? (max), 3a 9v 10% 1a maX8903A/b/c/d/e, 4mhz 2.2h inductor, ifsc1008aber2r2m01, vishay 2.5mm x 2mm x 1.2mm, 90m ? (max), 2.15a or 2.2h inductor, lqh3npn2r2nj0, murata 3mm x 3mm x 1.1mm, 83m ? (max), 1.15a 9v 10% 2a max8903g, 1mhz 4.3uh inductor, dem4518c (1235as-h-4r3m), toko 4.7mm x 4.5mm x 1.8mm, 84m ? (max), 2.0a or 4.7h inductor, ifsc1515aher4r7m01, vishay 3.8mm x 3.8mm x 1.8mm, 90m ? (max), 2.0a 9v 10% 1a max8903g, 1mhz 4.7h inductor, dem2818c (1227as-h-4r7m), toko 3.2mm x 2.8mm x 1.8mm, 92m ? (max), 1.1a or 4.7h inductor, ifsc1008aber4r7m01, vishay 2.5mm x 2mm x 1.2mm, 212m ? (max), 1.2a 12v 10% 2a max8903g, 1mhz 4.3h inductor, dem4518c (1235as-h-4r3m), toko 4.7mm x 4.5mm x 1.8mm, 84m ? (max), 2.0a or 4.7h inductor, ifsc1515aher4r7m01, vishay 3.8mm x 3.8mm x 1.8mm, 90m ? (max), 2.0a 12v 10% 1a max8903g, 1mhz 6.8h, ifsc1515aher6r8m01, vishay 3.8mm x 3.8mm x 1.8mm, 115m ? (max), 1.5a or 6.8h, lqh44pn6r8mp0, murata 4mm x 4mm x 1.65mm, 144m ? (max), 1.34a *??????? 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 25 25
?? max8903_??????? ???maX8903A-max8903e/max8903g/ max8903h/max8903j/max8903n/max8903y? ???????? 6????? 6. ?? ?5?/? ? ?6??????? ?7?? ???? ? ?8max8903hmax8903c?? 2ali+dc-dc usb?? 26 ______________________________________________________________________________________ note 5: typical values. see the electrical characteristics table for min/max values. note 6: note that this also changes the timing for the prequal and fast-charge timers. note 7: see the power enable on battery detection section for details. selector guide the max8903_ is available in several options designat- ed by the first letter following the root part number. the basic architecture and functionality of the maX8903ACmax8903e/max8903g/max8903y are the same. their differences lie in certain electrical and operational parameters. table 6 outlines these differ- ences. parameter maX8903A max8903b max8903c max8903d max8903e max8903g max8903h max8903j max8903n max8903y minimum sys regulation voltage (v sysmin ) 3.0v 3.0v 3.4v 3.4v 3.0v 3.0v 3.4v 3.4v 3.4v 3.0v sys regulation voltage (v sysreg ) 4.4v 4.325v 4.4v 4.4v 4.325v 4.325v 4.4v 4.5v 4.4v 4.4v minimum allowable inductor 2.2h 2.2h 2.2h 2.2h 2.2h 2.2h 1h 1h 1h 1h switching frequency 4mhz 4mhz 4mhz 4mhz 4mhz 1mhz 4mhz 4mhz 4mhz 4mhz sys load regulation 40mv/a 25mv/a 40mv/a 40mv/a 25mv/a 25mv/a 40mv/a 25mv/a 25mv/a 25mv/a mi ni mum sy s outp ut capaci t or ( c sys ) 10f 22f 10f 10f 22f 22f 10f 10f 22f 22f bat regulation voltage (v batreg ) (note 5) 4.2v 4.2v 4.2v 4.1v 4.1v 4.2v 4.2v 4.35v 4.15v 4.15v bat prequal threshold (v batpq ) (note 5) 3v 2.5v 3v 3v 2.5v 2.5v 3v 3v 3v 3v top-off timer (note 6) 15s (fixed) 132min 15s (fixed) 15s (fixed) 132min 132min 15s (fixed) 15s (fixed) 15s (fixed) 15s (fixed) vl output current rating 1ma 10ma 1ma 1ma 10ma 10ma 1ma 1ma 1ma 1ma power-enable on battery detection (note 7) no yes no no yes yes no no no no comments (note 8) maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 26 2ali + dc-dc usb?? 26 maxim integrated 26 maX8903A-e/g/h/j/n/y
?? process: bicmos 2ali+dc-dc usb?? tqfn top view 26 27 25 24 10 9 11 pg dc dcm bst iusb 12 pg bat flt usb bat thm usus 12 cs 4567 2021 19 17 16 15 cs lx gnd idc ct vl dc uok 3 18 28 8 lx dok sys 23 13 iset sys 22 14 cen chg + ep max8903_ pin configuration chip information process: bicmos maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 27 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 27 27
?? ?????(?)? china.maxim-ic.com/packages ????+#- ?rohs?????????????rohs???? 2ali+dc-dc usb?? package type package code outline no. land pattern no. 28 tqfn-ep t2844-1 21-0139 90-0035 package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a "+", "#", or "-" in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing per- maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 28 ? ? ?? 28 tqfn-ep t2844-1 21-0139 90-0035 2ali + dc-dc usb?? 28 maxim integrated 28 maX8903A-e/g/h/j/n/y
??() ?????(?)? china.maxim-ic.com/packages ????+#- ?rohs?????????????rohs???? 2ali+dc-dc usb?? ______________________________________________________________________________________ 29 package information (continued) for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a "+", "#", or "-" in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing per- maX8903A ds c_maX8903A ds 2012-6-26 12:56 ? 29 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y maxim integrated 29 29
?? ? ? ? ?? 0 12/08 1 8/09 max8903c/max8903d 1C20 2 11/09 ?? 1C7, 9, 11C21 3 10/10 max8903bmax8903emax8903gmax8903y 1C29 4 5/11 max8903hmax8903j?? 1C29 5 9/11 max8903n?max8903j?? 1C29 2ali + dc-dc usb?? maX8903A-e/g/h/j/n/y ma xim ma xim ??????? ? max im ????????? ? ???(??)?????? maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-1000 30 ? 2011 maxim integrated maxim?maxim integratedmaxim integrated products, inc.?? maxim 8328 100083 ?800 810 0310 010-6211 5199 010-6211 5299

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